JPS5617565A - Control system for multistage buffer memory - Google Patents

Abstract

PURPOSE:To simplify the process of the common control part and thus enhance the economical performance for the control system, by providing the circuit designating function for the transfer request of the buffer memory which is further away from the storing part to the buffer memory which is near the storing part and then carrying out the counting process via the memory which is near the receiving or transmitting part. CONSTITUTION:In case the 2nd buffer memory 14 has the shortage of memory, memory 14 ignores the transfer request given from the 1st buffer memory 12. Thus the shortage of memory is caused to memory 12, and the overflow process is carried out only by memory 12. On the other hand, when the interruption of signals is caused at the 3rd buffer memory 16, memory 16 ignores the transfer request from the 4th buffer memory 18. Thus the interruption of signals is caused to memory 18 to carry out the underflow process of only memory 18. As a result, both the overflow and underflow processes have only to be carried out just by the memory nearest picture signal transmitting and receiving parts 11 and 19. And only two control lines 30 and 31 suffice, and thus the starting frequency of common control part 10 is reduced also to simplify the process of the control part.