JPS5646557A - Transistor - Google Patents
TransistorInfo
- Publication number
- JPS5646557A JPS5646557A JP12255379A JP12255379A JPS5646557A JP S5646557 A JPS5646557 A JP S5646557A JP 12255379 A JP12255379 A JP 12255379A JP 12255379 A JP12255379 A JP 12255379A JP S5646557 A JPS5646557 A JP S5646557A
- Authority
- JP
- Japan
- Prior art keywords
- layers
- type
- grooves
- sio2
- film
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
- H10D62/13—Semiconductor regions connected to electrodes carrying current to be rectified, amplified or switched, e.g. source or drain regions
- H10D62/149—Source or drain regions of field-effect devices
- H10D62/151—Source or drain regions of field-effect devices of IGFETs
Landscapes
- Bipolar Transistors (AREA)
- Non-Volatile Memory (AREA)
Abstract
PURPOSE:To obtain an FET which incorporates a small size and stable characteristics by forming insulating layers selectively on the recessed surface of a P type substrate and filling N type layers therein. CONSTITUTION:Field oxide films 22 are formed on the (100) surface of a P type Si substrate 21, SiO2 film 23, Si3N4 film 24 and a polysilicon gate electrode 25 are formed thereon, the an SiO2 film 26 is covered thereon. The substrate 21 is anisotropically etched, and grooves 27, 28 are opened therebetween. At this time the grooves are partly intruded as designated by 29, 30 underneath the film 23. An O2 ions are implanted, and SiO2 layers 31, 32 are formed on the surfaces of the grooves. At this time the crystallinity of the P type thin layer on the layers 31, 32 is not damaged. When an N<+> type epitaxial layer 33 covers the P type thin layer, it is erased. Then, the layer 33 is etched, N<+> type layers 41, 42 are formed thereon, SiO2 films 43, 44 are covered thereon, are opened with windows 45-47, and aluminum electrodes 48-50 are attached thereto. The depths of the source and the drain are determined by the depths of the grooves in the vicinity of the upper ends 29, 30, and can be accurately determined by anisotropic etching process. Aluminum punch through phenomenon is prevented by the layers 31, 32, and is thus hardly taken place. In this manner there can be obtained an FET which incorporates small size and preferable characteristics.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP12255379A JPS5646557A (en) | 1979-09-26 | 1979-09-26 | Transistor |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP12255379A JPS5646557A (en) | 1979-09-26 | 1979-09-26 | Transistor |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS5646557A true JPS5646557A (en) | 1981-04-27 |
Family
ID=14838719
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP12255379A Pending JPS5646557A (en) | 1979-09-26 | 1979-09-26 | Transistor |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5646557A (en) |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS60103671A (en) * | 1983-11-11 | 1985-06-07 | Toshiba Corp | Semiconductor device |
| JPS6317218A (en) * | 1986-07-07 | 1988-01-25 | Nippon Sheet Glass Co Ltd | Regeneration of molten salt |
| WO1997048135A1 (en) * | 1996-06-14 | 1997-12-18 | Commissariat A L'energie Atomique | Quantum well mos transistor and methods for making same |
| KR20030002519A (en) * | 2001-06-29 | 2003-01-09 | 주식회사 하이닉스반도체 | Forming method for transistor of semiconductor device |
-
1979
- 1979-09-26 JP JP12255379A patent/JPS5646557A/en active Pending
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS60103671A (en) * | 1983-11-11 | 1985-06-07 | Toshiba Corp | Semiconductor device |
| JPS6317218A (en) * | 1986-07-07 | 1988-01-25 | Nippon Sheet Glass Co Ltd | Regeneration of molten salt |
| WO1997048135A1 (en) * | 1996-06-14 | 1997-12-18 | Commissariat A L'energie Atomique | Quantum well mos transistor and methods for making same |
| FR2749977A1 (en) * | 1996-06-14 | 1997-12-19 | Commissariat Energie Atomique | QUANTUM WELL MOS TRANSISTOR AND METHODS OF MANUFACTURE THEREOF |
| KR20030002519A (en) * | 2001-06-29 | 2003-01-09 | 주식회사 하이닉스반도체 | Forming method for transistor of semiconductor device |
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