JPS5649532A - Manufacture of silicon substrate - Google Patents

Manufacture of silicon substrate

Info

Publication number
JPS5649532A
JPS5649532A JP12420479A JP12420479A JPS5649532A JP S5649532 A JPS5649532 A JP S5649532A JP 12420479 A JP12420479 A JP 12420479A JP 12420479 A JP12420479 A JP 12420479A JP S5649532 A JPS5649532 A JP S5649532A
Authority
JP
Japan
Prior art keywords
crystal defects
substrate
defects
silicon substrate
heat treated
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP12420479A
Other languages
English (en)
Japanese (ja)
Other versions
JPS5722417B2 (cs
Inventor
Masanobu Hagino
Masaharu Watanabe
Koichi Sekine
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP12420479A priority Critical patent/JPS5649532A/ja
Publication of JPS5649532A publication Critical patent/JPS5649532A/ja
Publication of JPS5722417B2 publication Critical patent/JPS5722417B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P95/00—Generic processes or apparatus for manufacture or treatments not covered by the other groups of this subclass
    • H10P95/90—Thermal treatments, e.g. annealing or sintering

Landscapes

  • Crystals, And After-Treatments Of Crystals (AREA)
JP12420479A 1979-09-28 1979-09-28 Manufacture of silicon substrate Granted JPS5649532A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP12420479A JPS5649532A (en) 1979-09-28 1979-09-28 Manufacture of silicon substrate

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP12420479A JPS5649532A (en) 1979-09-28 1979-09-28 Manufacture of silicon substrate

Publications (2)

Publication Number Publication Date
JPS5649532A true JPS5649532A (en) 1981-05-06
JPS5722417B2 JPS5722417B2 (cs) 1982-05-13

Family

ID=14879557

Family Applications (1)

Application Number Title Priority Date Filing Date
JP12420479A Granted JPS5649532A (en) 1979-09-28 1979-09-28 Manufacture of silicon substrate

Country Status (1)

Country Link
JP (1) JPS5649532A (cs)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58212162A (ja) * 1982-06-03 1983-12-09 Matsushita Electronics Corp 半導体装置およびその製造方法
US4505759A (en) * 1983-12-19 1985-03-19 Mara William C O Method for making a conductive silicon substrate by heat treatment of oxygenated and lightly doped silicon single crystals
US4597804A (en) * 1981-03-11 1986-07-01 Fujitsu Limited Methods of forming denuded zone in wafer by intrinsic gettering and forming bipolar transistor therein
JPH02224249A (ja) * 1988-11-29 1990-09-06 Nec Corp Ｓｉ基板の製造方法
JP2013030723A (ja) * 2011-06-24 2013-02-07 Covalent Materials Corp シリコンウェーハの製造方法

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4597804A (en) * 1981-03-11 1986-07-01 Fujitsu Limited Methods of forming denuded zone in wafer by intrinsic gettering and forming bipolar transistor therein
JPS58212162A (ja) * 1982-06-03 1983-12-09 Matsushita Electronics Corp 半導体装置およびその製造方法
US4505759A (en) * 1983-12-19 1985-03-19 Mara William C O Method for making a conductive silicon substrate by heat treatment of oxygenated and lightly doped silicon single crystals
JPH02224249A (ja) * 1988-11-29 1990-09-06 Nec Corp Ｓｉ基板の製造方法
JP2013030723A (ja) * 2011-06-24 2013-02-07 Covalent Materials Corp シリコンウェーハの製造方法

Also Published As

Publication number Publication date
JPS5722417B2 (cs) 1982-05-13

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