JPS5649571A - Semiconductor memory and its manufacturing process - Google Patents

Semiconductor memory and its manufacturing process

Info

Publication number
JPS5649571A
JPS5649571A JP12413279A JP12413279A JPS5649571A JP S5649571 A JPS5649571 A JP S5649571A JP 12413279 A JP12413279 A JP 12413279A JP 12413279 A JP12413279 A JP 12413279A JP S5649571 A JPS5649571 A JP S5649571A
Authority
JP
Japan
Prior art keywords
film oxide
polysilicon
gate
film
drain
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP12413279A
Other languages
Japanese (ja)
Inventor
Kazuhiro Komori
Yasunobu Osa
Jun Sugiura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP12413279A priority Critical patent/JPS5649571A/en
Publication of JPS5649571A publication Critical patent/JPS5649571A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/68—Floating-gate IGFETs
    • H10D30/681—Floating-gate IGFETs having only two programming levels

Landscapes

  • Non-Volatile Memory (AREA)

Abstract

PURPOSE:To prevent data leakage because of hygroscopic PSG protective film by covering the ends of the floating gate layer source and drain sides with polysilicon film oxide. CONSTITUTION:By striking B-ion high-densedly in a P type Si substrate and selectively oxidizing to form a channel stopper 11A and film oxide 11 followed by laminating with gate film oxide 12, polysilicon 13A. By providing the surface with film oxide 14 laminated with polysilicon 15, etched by applying the Si3N4 mask 16 a control gate 15 and interlayer insulating film 14 are made. Preparing N layers 18A, 19A by ion injection and thermally treated an N<+>-source 18, drain 19 are formed. Simultaneously by oxidizing polisilicon 13A to make thick film oxide 20, 21 a terminal edge of a gate layer 13 is made almost correspond to the gate side terminal edges of the layers 18, 19. Removing the mask 16 and selectively making an opening 21a to be covered with PSG 22 an N<+> drain connecting layer 23 and a data line 24 are formed. Said constitution improves the hodling characteristic and provides a small-sized memory.
JP12413279A 1979-09-28 1979-09-28 Semiconductor memory and its manufacturing process Pending JPS5649571A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP12413279A JPS5649571A (en) 1979-09-28 1979-09-28 Semiconductor memory and its manufacturing process

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP12413279A JPS5649571A (en) 1979-09-28 1979-09-28 Semiconductor memory and its manufacturing process

Publications (1)

Publication Number Publication Date
JPS5649571A true JPS5649571A (en) 1981-05-06

Family

ID=14877704

Family Applications (1)

Application Number Title Priority Date Filing Date
JP12413279A Pending JPS5649571A (en) 1979-09-28 1979-09-28 Semiconductor memory and its manufacturing process

Country Status (1)

Country Link
JP (1) JPS5649571A (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5850771A (en) * 1981-09-21 1983-03-25 Hitachi Ltd High integration rom enable of rewriting and manufacture thereof
JPS6018967A (en) * 1983-07-12 1985-01-31 Seiko Epson Corp Method of manufacturing semiconductor memory device
JPS61179945U (en) * 1985-04-30 1986-11-10
JPS61179946U (en) * 1985-04-30 1986-11-10
JPS63161674A (en) * 1986-12-25 1988-07-05 Toshiba Corp Semiconductor memory device

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5850771A (en) * 1981-09-21 1983-03-25 Hitachi Ltd High integration rom enable of rewriting and manufacture thereof
JPS6018967A (en) * 1983-07-12 1985-01-31 Seiko Epson Corp Method of manufacturing semiconductor memory device
JPS61179945U (en) * 1985-04-30 1986-11-10
JPS61179946U (en) * 1985-04-30 1986-11-10
JPS63161674A (en) * 1986-12-25 1988-07-05 Toshiba Corp Semiconductor memory device

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