JPS5659330A - Timing generating circuit for interieave - Google Patents

Abstract

PURPOSE: To make it possible to generate a highly accurate timing by a small- sized and inexpensive circuit, by taking the logic of one pair of highly accurate timing generating circuits and a lowly accurate timing generating circuit.

CONSTITUTION: The highly accurate timing generating circuit 1 inputs a basic clock C₀, outputs the highly accurate timings τ_a, τ_b, and provides them to the gates 12, 13 of the lowly accurate timing generation system I. The timing t₁₀ of the timing generation circuit 11 is broader than τ_a in width, and its width is shaped by τ_a, and it becomes timing T_1a. The timing t₁₂ of the circuit 11 becomes τ_1b after its width has been shaped by τ_b, and the trailing edge of the timing t₁₁ of the circuit 11 is regulated by τ_1b to obtain the timing T_1b. The timing generation system IIWN have the same structure as the timing generation system I.

COPYRIGHT: (C)1981,JPO&Japio