JPS566437A - Alignment - Google Patents

Alignment

Info

Publication number
JPS566437A
JPS566437A JP8040279A JP8040279A JPS566437A JP S566437 A JPS566437 A JP S566437A JP 8040279 A JP8040279 A JP 8040279A JP 8040279 A JP8040279 A JP 8040279A JP S566437 A JPS566437 A JP S566437A
Authority
JP
Japan
Prior art keywords
alignment
wafer
fixed
groove
key
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP8040279A
Other languages
Japanese (ja)
Inventor
Nobuhiro Endo
Yukinori Kuroki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
CHIYOU LSI GIJUTSU KENKYU KUMIAI
Original Assignee
CHIYOU LSI GIJUTSU KENKYU KUMIAI
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by CHIYOU LSI GIJUTSU KENKYU KUMIAI filed Critical CHIYOU LSI GIJUTSU KENKYU KUMIAI
Priority to JP8040279A priority Critical patent/JPS566437A/en
Publication of JPS566437A publication Critical patent/JPS566437A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P95/00—Generic processes or apparatus for manufacture or treatments not covered by the other groups of this subclass

Landscapes

  • Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
  • Microscoopes, Condenser (AREA)
  • Preparing Plates And Mask In Photomechanical Process (AREA)
  • Exposure And Positioning Against Photoresist Photosensitive Materials (AREA)

Abstract

PURPOSE:To make possible quick alignment by arranging two fixed keys on the two eyepieces each for the aligning microscope along with groove having a sharp edge provided on the semiconductor wafer beforehand. CONSTITUTION:The reticle 24 matches the alignment mark 22 fixed on the optical cylinder 23. Then, two cross patterns, namely fixed key, provided in the aligning microscope 26 being fixed on the optical cylinder overlaps a pattern, namely alignment key 30, applied on the wafer 27 to perform alignment. In this case, the alignment key 30 on the wafer 27 is formed by engraving a groove with an sharp edge by sputtering or the like before the formation of the element region on the wafer 27. This prevents the deformation of the groove due to the subsequent treatment of the wafer thereby preserving the edge of the cross pattern. Thus, alignment can be done with a high accuracy at a high speed.
JP8040279A 1979-06-26 1979-06-26 Alignment Pending JPS566437A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8040279A JPS566437A (en) 1979-06-26 1979-06-26 Alignment

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8040279A JPS566437A (en) 1979-06-26 1979-06-26 Alignment

Publications (1)

Publication Number Publication Date
JPS566437A true JPS566437A (en) 1981-01-23

Family

ID=13717287

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8040279A Pending JPS566437A (en) 1979-06-26 1979-06-26 Alignment

Country Status (1)

Country Link
JP (1) JPS566437A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57183033A (en) * 1981-05-06 1982-11-11 Toshiba Corp Method for wafer exposure and device thereof
US20120225538A1 (en) * 2011-03-03 2012-09-06 Minjung Kim Methods of disposing alignment keys and methods of fabricating semiconductor chips using the same

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5179582A (en) * 1975-01-07 1976-07-10 Canon Kk Araimentoyokii pataanhogohoho
JPS5230384A (en) * 1975-09-03 1977-03-08 Siemens Ag Method of automatically adjusting semiconductor plates
JPS5356975A (en) * 1976-11-01 1978-05-23 Hitachi Ltd Exposure apparatus

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5179582A (en) * 1975-01-07 1976-07-10 Canon Kk Araimentoyokii pataanhogohoho
JPS5230384A (en) * 1975-09-03 1977-03-08 Siemens Ag Method of automatically adjusting semiconductor plates
JPS5356975A (en) * 1976-11-01 1978-05-23 Hitachi Ltd Exposure apparatus

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57183033A (en) * 1981-05-06 1982-11-11 Toshiba Corp Method for wafer exposure and device thereof
US20120225538A1 (en) * 2011-03-03 2012-09-06 Minjung Kim Methods of disposing alignment keys and methods of fabricating semiconductor chips using the same

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