JPS5678148A - Resistance temperature compensation circuit - Google Patents

Resistance temperature compensation circuit

Info

Publication number
JPS5678148A
JPS5678148A JP15436979A JP15436979A JPS5678148A JP S5678148 A JPS5678148 A JP S5678148A JP 15436979 A JP15436979 A JP 15436979A JP 15436979 A JP15436979 A JP 15436979A JP S5678148 A JPS5678148 A JP S5678148A
Authority
JP
Japan
Prior art keywords
resistance
film
wirings
wiring
insulation
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP15436979A
Other languages
English (en)
Inventor
Tetsuo Sasaya
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP15436979A priority Critical patent/JPS5678148A/ja
Publication of JPS5678148A publication Critical patent/JPS5678148A/ja
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/80—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple passive components, e.g. resistors, capacitors or inductors
    • H10D86/85—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple passive components, e.g. resistors, capacitors or inductors characterised by only passive components

Landscapes

  • Parts Printed On Printed Circuit Boards (AREA)
JP15436979A 1979-11-30 1979-11-30 Resistance temperature compensation circuit Pending JPS5678148A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15436979A JPS5678148A (en) 1979-11-30 1979-11-30 Resistance temperature compensation circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15436979A JPS5678148A (en) 1979-11-30 1979-11-30 Resistance temperature compensation circuit

Publications (1)

Publication Number Publication Date
JPS5678148A true JPS5678148A (en) 1981-06-26

Family

ID=15582647

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15436979A Pending JPS5678148A (en) 1979-11-30 1979-11-30 Resistance temperature compensation circuit

Country Status (1)

Country Link
JP (1) JPS5678148A (ja)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5817402A (en) * 1994-07-29 1998-10-06 Sekisui Kagaku Kogyo Kabushiki Kaisha Covering sheet having minute unevenness on the surface thereof, methods of producing said sheet and a molding using said sheet
US5997675A (en) * 1994-07-29 1999-12-07 Sekisui Kagaku Kogyo Kabushiki Kaisha Method of molding using a covering sheet having minute unevenness on the surface thereof
US6419778B2 (en) 1996-05-23 2002-07-16 Sekisui Kagaku Kogyo Kabushiki Kaisha Covering sheet having minute unevenness on the surface thereof, methods of producing said sheet and a molding using said sheet
JP2002539634A (ja) * 1999-03-16 2002-11-19 モトローラ・インコーポレイテッド 多層集積薄膜金属抵抗器を有するプリント配線板とその製造方法

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5817402A (en) * 1994-07-29 1998-10-06 Sekisui Kagaku Kogyo Kabushiki Kaisha Covering sheet having minute unevenness on the surface thereof, methods of producing said sheet and a molding using said sheet
US5997675A (en) * 1994-07-29 1999-12-07 Sekisui Kagaku Kogyo Kabushiki Kaisha Method of molding using a covering sheet having minute unevenness on the surface thereof
US6419778B2 (en) 1996-05-23 2002-07-16 Sekisui Kagaku Kogyo Kabushiki Kaisha Covering sheet having minute unevenness on the surface thereof, methods of producing said sheet and a molding using said sheet
JP2002539634A (ja) * 1999-03-16 2002-11-19 モトローラ・インコーポレイテッド 多層集積薄膜金属抵抗器を有するプリント配線板とその製造方法
EP1082732A4 (en) * 1999-03-16 2006-11-22 Motorola Inc CIRCUIT BOARD WITH MULTILAYER METALLIC RESISTANCE INTEGRATED THIN FILM AND METHOD OF MANUFACTURING THE SAME

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