JPS5687352A - Semiconductor device - Google Patents
Semiconductor deviceInfo
- Publication number
- JPS5687352A JPS5687352A JP16426679A JP16426679A JPS5687352A JP S5687352 A JPS5687352 A JP S5687352A JP 16426679 A JP16426679 A JP 16426679A JP 16426679 A JP16426679 A JP 16426679A JP S5687352 A JPS5687352 A JP S5687352A
- Authority
- JP
- Japan
- Prior art keywords
- type
- resistor
- layer
- collector region
- surface layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/60—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D10/00 or H10D18/00, e.g. integration of BJTs
- H10D84/611—Combinations of BJTs and one or more of diodes, resistors or capacitors
- H10D84/613—Combinations of vertical BJTs and one or more of diodes, resistors or capacitors
- H10D84/615—Combinations of vertical BJTs and one or more of resistors or capacitors
Landscapes
- Semiconductor Integrated Circuits (AREA)
Abstract
PURPOSE:To obtain a resistor body having a small occupying area in the semiconductor device by a method wherein a reverse conducting collector region and a reverse conducting resistor region coming in contact with the collector region are formed on a unilateral conducting semiconductor layer having partially a buried layer of high impurity concentration. CONSTITUTION:A p type surface layer 10 is provided on the p type substrate 1 having partially the n<+> type buried layer 2 of high concentration, and the n type collector region 11 is formed in the p type surface layer on the buried layer. At the same time, the n<+> type resistor layer 5 is formed in the p type surface layer to come in contact with the n type collector region. Accordingly the occupying area of the resistor can be decreased, and the resistor can be arranged freely in the chip.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP16426679A JPS5687352A (en) | 1979-12-18 | 1979-12-18 | Semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP16426679A JPS5687352A (en) | 1979-12-18 | 1979-12-18 | Semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS5687352A true JPS5687352A (en) | 1981-07-15 |
Family
ID=15789813
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP16426679A Pending JPS5687352A (en) | 1979-12-18 | 1979-12-18 | Semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5687352A (en) |
-
1979
- 1979-12-18 JP JP16426679A patent/JPS5687352A/en active Pending
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