JPS5698832A - Preparation of semiconductor device - Google Patents

Preparation of semiconductor device

Info

Publication number
JPS5698832A
JPS5698832A JP99780A JP99780A JPS5698832A JP S5698832 A JPS5698832 A JP S5698832A JP 99780 A JP99780 A JP 99780A JP 99780 A JP99780 A JP 99780A JP S5698832 A JPS5698832 A JP S5698832A
Authority
JP
Japan
Prior art keywords
psg
etching
psg2
semiconductor substrate
setting
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP99780A
Other languages
Japanese (ja)
Inventor
Takeshi Yamano
Hideaki Arima
Hirozo Takano
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP99780A priority Critical patent/JPS5698832A/en
Publication of JPS5698832A publication Critical patent/JPS5698832A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/031—Manufacture or treatment of conductive parts of the interconnections
    • H10W20/069—Manufacture or treatment of conductive parts of the interconnections by forming self-aligned vias or self-aligned contact plugs

Landscapes

  • Electrodes Of Semiconductors (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Weting (AREA)

Abstract

PURPOSE:To open a fine window with a high accuracy by performing an etching with two steps in case of setting an electrode window on a PSG film of a semiconductor substrate. CONSTITUTION:The etching is performed to a PSG film 2 on a semiconductor substrate by setting a resist mask 3 and a part of the PSG is remained. The portion having grade difference is made smoothly by availing the plastic fluidity of the PSG removing the mask 3. Then, after performing a secondary resist mask 5 on the PSG2, said PSG2 is opened and a diffusion layer 6 is set to form a conductive film 4. By this method, an electrode window having a fine accuracy is formed without any effect of a side etching such as the conventional one.
JP99780A 1980-01-08 1980-01-08 Preparation of semiconductor device Pending JPS5698832A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP99780A JPS5698832A (en) 1980-01-08 1980-01-08 Preparation of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP99780A JPS5698832A (en) 1980-01-08 1980-01-08 Preparation of semiconductor device

Publications (1)

Publication Number Publication Date
JPS5698832A true JPS5698832A (en) 1981-08-08

Family

ID=11489226

Family Applications (1)

Application Number Title Priority Date Filing Date
JP99780A Pending JPS5698832A (en) 1980-01-08 1980-01-08 Preparation of semiconductor device

Country Status (1)

Country Link
JP (1) JPS5698832A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61259540A (en) * 1985-05-14 1986-11-17 Nec Corp Multilayer interconnection and manufacture thereof
JPH0377321A (en) * 1989-08-19 1991-04-02 Fuji Electric Co Ltd Formation of electrode connecting hole in semiconductor device

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61259540A (en) * 1985-05-14 1986-11-17 Nec Corp Multilayer interconnection and manufacture thereof
JPH0377321A (en) * 1989-08-19 1991-04-02 Fuji Electric Co Ltd Formation of electrode connecting hole in semiconductor device

Similar Documents

Publication Publication Date Title
JPS5698832A (en) Preparation of semiconductor device
JPS57154855A (en) Manufacture of semiconductor device
JPS5723239A (en) Manufacture of semiconductor device
JPS57109365A (en) Semiconductor ic device
JPS5456357A (en) Production of semiconductor device
JPS5680130A (en) Manufacture of semiconductor device
JPS5732635A (en) Production of semiconductor device
JPS56135970A (en) Semiconductor device
JPS56125856A (en) Manufacture of semiconductor device
JPS5545196A (en) Fabricating method for thin-film magnetic head
JPS56126957A (en) Manufacture of semiconductor device
JPS56148825A (en) Manufacture of semiconductor device
JPS5455379A (en) Production of mesa type semiconductor device
JPS56130925A (en) Manufacture of semiconductor device
JPS57181137A (en) Manufacture of semiconductor device
JPS5779670A (en) Manufacture of semiconductor device
JPS5766631A (en) Manufacture of semiconductor device
JPS57124443A (en) Forming method for electrode layer
JPS5526637A (en) Manufacturing of semiconductor device
JPS5759331A (en) Manufacture of semiconductor device
JPS55118679A (en) Manufacture of field effect transistor
JPS558032A (en) Semi-conductor device manufacturing method
JPS57211243A (en) Manufacture of semiconductor device
JPS56133873A (en) Manufacture of semiconductor device
JPS5226169A (en) Photoetching method of silicone oxide layer