JPS57111032A - Forming method for pattern - Google Patents

Forming method for pattern

Info

Publication number
JPS57111032A
JPS57111032A JP55189024A JP18902480A JPS57111032A JP S57111032 A JPS57111032 A JP S57111032A JP 55189024 A JP55189024 A JP 55189024A JP 18902480 A JP18902480 A JP 18902480A JP S57111032 A JPS57111032 A JP S57111032A
Authority
JP
Japan
Prior art keywords
layer
oxidizing
pattern
oxide layer
patterned
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP55189024A
Other languages
English (en)
Japanese (ja)
Other versions
JPS634700B2 (da
Inventor
Kazuo Hirata
Masatoshi Oda
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NTT Inc
Original Assignee
Nippon Telegraph and Telephone Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Telegraph and Telephone Corp filed Critical Nippon Telegraph and Telephone Corp
Priority to JP55189024A priority Critical patent/JPS57111032A/ja
Priority to NLAANVRAGE8105661,A priority patent/NL188432C/xx
Priority to FR8123625A priority patent/FR2497403B1/fr
Priority to US06/331,612 priority patent/US4460413A/en
Priority to GB8138219A priority patent/GB2092373B/en
Priority to DE19813151915 priority patent/DE3151915A1/de
Priority to CA000393192A priority patent/CA1186600A/en
Publication of JPS57111032A publication Critical patent/JPS57111032A/ja
Publication of JPS634700B2 publication Critical patent/JPS634700B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00Electrodes of devices having potential barriers
    • H10D64/01Manufacture or treatment
    • H10D64/013Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator
    • H10D64/01302Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H10D64/01304Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor
    • H10D64/01326Aspects related to lithography, isolation or planarisation of the conductor
    • H10D64/01328Aspects related to lithography, isolation or planarisation of the conductor by defining the conductor using a sidewall spacer mask, a transformation under a mask or a plating at a sidewall
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60Formation of materials, e.g. in the shape of layers or pillars of insulating materials

Landscapes

  • Drying Of Semiconductors (AREA)
  • Formation Of Insulating Films (AREA)
JP55189024A 1980-12-26 1980-12-26 Forming method for pattern Granted JPS57111032A (en)

Priority Applications (7)

Application Number Priority Date Filing Date Title
JP55189024A JPS57111032A (en) 1980-12-26 1980-12-26 Forming method for pattern
NLAANVRAGE8105661,A NL188432C (nl) 1980-12-26 1981-12-16 Werkwijze voor het vervaardigen van een mosfet.
FR8123625A FR2497403B1 (fr) 1980-12-26 1981-12-17 Procede de formation de reseaux extremement fins en particulier pour la fabrication de transistors
US06/331,612 US4460413A (en) 1980-12-26 1981-12-17 Method of patterning device regions by oxidizing patterned aluminum layer
GB8138219A GB2092373B (en) 1980-12-26 1981-12-18 A method of forming patterns
DE19813151915 DE3151915A1 (de) 1980-12-26 1981-12-23 Verfahren zum bilden von mustern oder schablonen
CA000393192A CA1186600A (en) 1980-12-26 1981-12-24 Method of forming patterns

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP55189024A JPS57111032A (en) 1980-12-26 1980-12-26 Forming method for pattern

Publications (2)

Publication Number Publication Date
JPS57111032A true JPS57111032A (en) 1982-07-10
JPS634700B2 JPS634700B2 (da) 1988-01-30

Family

ID=16234019

Family Applications (1)

Application Number Title Priority Date Filing Date
JP55189024A Granted JPS57111032A (en) 1980-12-26 1980-12-26 Forming method for pattern

Country Status (1)

Country Link
JP (1) JPS57111032A (da)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5957450A (ja) * 1982-09-27 1984-04-03 Nec Corp 半導体装置の素子分離方法

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5212546A (en) * 1975-07-21 1977-01-31 Tektronix Inc Parallel phase amplifier
JPS55163863A (en) * 1979-06-07 1980-12-20 Matsushita Electric Ind Co Ltd Formation of wiring pattern

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5212546A (en) * 1975-07-21 1977-01-31 Tektronix Inc Parallel phase amplifier
JPS55163863A (en) * 1979-06-07 1980-12-20 Matsushita Electric Ind Co Ltd Formation of wiring pattern

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5957450A (ja) * 1982-09-27 1984-04-03 Nec Corp 半導体装置の素子分離方法

Also Published As

Publication number Publication date
JPS634700B2 (da) 1988-01-30

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