JPS57157663A - Communication system - Google Patents

Communication system

Info

Publication number
JPS57157663A
JPS57157663A JP4342081A JP4342081A JPS57157663A JP S57157663 A JPS57157663 A JP S57157663A JP 4342081 A JP4342081 A JP 4342081A JP 4342081 A JP4342081 A JP 4342081A JP S57157663 A JPS57157663 A JP S57157663A
Authority
JP
Japan
Prior art keywords
terminal
line
branching device
data
switches
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP4342081A
Other languages
Japanese (ja)
Inventor
Taiho Higuchi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP4342081A priority Critical patent/JPS57157663A/en
Publication of JPS57157663A publication Critical patent/JPS57157663A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00—Data switching networks
    • H04L12/28—Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
    • H04L12/42—Loop networks
    • H04L12/437—Ring fault isolation or reconfiguration

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Small-Scale Networks (AREA)

Abstract

PURPOSE:To reduce influence exerted to a system due to a fault of a terminal, by providing a branching device and a compounding device on each terminal, connecting a bus line like a loop, and also providing a switch in the loop. CONSTITUTION:Each terminal, that is, nodes 1-4 are connected by bus lines 12, 13. A signal inputted through the line 12 is transferred to a terminal apparatus 9 through a branching device 14. When receiving a data from the line 13, it is executed in the same way through a branching device 15. A data from the apparatus 9 is loaded on the lines 12, 13 through compounding devices 16, 17. One of the switches 10, 11 is usually turned off. In case when a cable has been disconnected, data communication can be executed continuously by turning on all the switches.
JP4342081A 1981-03-25 1981-03-25 Communication system Pending JPS57157663A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4342081A JPS57157663A (en) 1981-03-25 1981-03-25 Communication system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4342081A JPS57157663A (en) 1981-03-25 1981-03-25 Communication system

Publications (1)

Publication Number Publication Date
JPS57157663A true JPS57157663A (en) 1982-09-29

Family

ID=12663205

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4342081A Pending JPS57157663A (en) 1981-03-25 1981-03-25 Communication system

Country Status (1)

Country Link
JP (1) JPS57157663A (en)

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