JPS5724083A - Buffer memory - Google Patents

Buffer memory

Info

Publication number
JPS5724083A
JPS5724083A JP9772780A JP9772780A JPS5724083A JP S5724083 A JPS5724083 A JP S5724083A JP 9772780 A JP9772780 A JP 9772780A JP 9772780 A JP9772780 A JP 9772780A JP S5724083 A JPS5724083 A JP S5724083A
Authority
JP
Japan
Prior art keywords
memory
bit
stores
register
buffer memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP9772780A
Other languages
Japanese (ja)
Inventor
Hideki Nishimura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP9772780A priority Critical patent/JPS5724083A/en
Publication of JPS5724083A publication Critical patent/JPS5724083A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/12—Replacement control

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Memory System Of A Hierarchy Structure (AREA)

Abstract

PURPOSE:To increase the bit rate of a buffer memory and reduce the access competition to a main storage device, by securing a long time residence of the data having a high using number of times in a buffer memory. CONSTITUTION:A real address register 13 stores the addresses containing a set address 23 that gives an access to a buffer memory 11 having columns 0-3. In addition to the register 13, the following units are provided: a memory 15 that stores the LRU bit to replace the storage contents of the memory 11; an address register 16 to the memory 15; a register 12 that stores a buffer request containing a residence indication bit 14; and a replacing circuit 17. Then the data read out of a main storage device is registered in the memory 11 in case a desired data exists in the memory 11 to an access of ''1'' for the bit 14.
JP9772780A 1980-07-17 1980-07-17 Buffer memory Pending JPS5724083A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9772780A JPS5724083A (en) 1980-07-17 1980-07-17 Buffer memory

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9772780A JPS5724083A (en) 1980-07-17 1980-07-17 Buffer memory

Publications (1)

Publication Number Publication Date
JPS5724083A true JPS5724083A (en) 1982-02-08

Family

ID=14199912

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9772780A Pending JPS5724083A (en) 1980-07-17 1980-07-17 Buffer memory

Country Status (1)

Country Link
JP (1) JPS5724083A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60230247A (en) * 1984-04-27 1985-11-15 Panafacom Ltd Disk control device
EP0278478A3 (en) * 1987-02-09 1989-06-07 Nec Corporation Cache memory system with improved re-writing address determination scheme
JPH01205250A (en) * 1988-02-12 1989-08-17 Fujitsu Ltd Method for controlling cache memory

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60230247A (en) * 1984-04-27 1985-11-15 Panafacom Ltd Disk control device
EP0278478A3 (en) * 1987-02-09 1989-06-07 Nec Corporation Cache memory system with improved re-writing address determination scheme
JPH01205250A (en) * 1988-02-12 1989-08-17 Fujitsu Ltd Method for controlling cache memory

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