JPS5759260A - Microcomputer - Google Patents
MicrocomputerInfo
- Publication number
- JPS5759260A JPS5759260A JP55133771A JP13377180A JPS5759260A JP S5759260 A JPS5759260 A JP S5759260A JP 55133771 A JP55133771 A JP 55133771A JP 13377180 A JP13377180 A JP 13377180A JP S5759260 A JPS5759260 A JP S5759260A
- Authority
- JP
- Japan
- Prior art keywords
- memory
- type
- address
- gate
- software
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/06—Addressing a physical block of locations, e.g. base addressing, module addressing, memory dedication
- G06F12/0646—Configuration or reconfiguration
- G06F12/0669—Configuration or reconfiguration with decentralised address assignment
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Microcomputers (AREA)
Abstract
PURPOSE:To confirm the packing state of a memory in terms of a software, by providing a memory-based storage part. CONSTITUTION:Various types of memories are divided into memory modules, and a memory-based storage part 16 is provided to each module to store the type of the memory. At the same time, a gate 17 for part 16 plus a control circuit 18 that opens/closes the gate 17 are added to read the contents of the part 16. When a memory is packed, switch groups SW1 and SW2 of the part 16 are set by the type of the memory. Then an optional address is allotted to the part of an address buffer 12 by switching a switch, etc. After packing a memory in such way, the memory is connected to a processor to inspect both the address plus the type and packing state of the memory in terms of a software.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP55133771A JPS5759260A (en) | 1980-09-26 | 1980-09-26 | Microcomputer |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP55133771A JPS5759260A (en) | 1980-09-26 | 1980-09-26 | Microcomputer |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS5759260A true JPS5759260A (en) | 1982-04-09 |
Family
ID=15112580
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP55133771A Pending JPS5759260A (en) | 1980-09-26 | 1980-09-26 | Microcomputer |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5759260A (en) |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS59136861A (en) * | 1983-01-27 | 1984-08-06 | Canon Inc | Electronic device |
| JPH0212686A (en) * | 1988-06-30 | 1990-01-17 | Pfu Ltd | Memory board identification method |
| JPH0394354A (en) * | 1989-09-07 | 1991-04-19 | Canon Inc | IC card |
| JPH0430285A (en) * | 1990-05-25 | 1992-02-03 | Hitachi Ltd | Memory card |
-
1980
- 1980-09-26 JP JP55133771A patent/JPS5759260A/en active Pending
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS59136861A (en) * | 1983-01-27 | 1984-08-06 | Canon Inc | Electronic device |
| JPH0212686A (en) * | 1988-06-30 | 1990-01-17 | Pfu Ltd | Memory board identification method |
| JPH0394354A (en) * | 1989-09-07 | 1991-04-19 | Canon Inc | IC card |
| JPH0430285A (en) * | 1990-05-25 | 1992-02-03 | Hitachi Ltd | Memory card |
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