JPS572564A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPS572564A
JPS572564A JP7563080A JP7563080A JPS572564A JP S572564 A JPS572564 A JP S572564A JP 7563080 A JP7563080 A JP 7563080A JP 7563080 A JP7563080 A JP 7563080A JP S572564 A JPS572564 A JP S572564A
Authority
JP
Japan
Prior art keywords
junction
groove
withstand voltage
type
layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP7563080A
Other languages
Japanese (ja)
Inventor
Tomoyuki Tanaka
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP7563080A priority Critical patent/JPS572564A/en
Publication of JPS572564A publication Critical patent/JPS572564A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies

Landscapes

  • Bipolar Transistors (AREA)
  • Formation Of Insulating Films (AREA)

Abstract

PURPOSE:To obtain a withstand voltage of a semiconductor device, the voltage thereof is in the vicinity of an ideal withstand voltage by relatively increasing impurity density in the prescribed distance from a p-n junction exposed on the inner surface of a groove of a moat structure and setting the impurity in opposite symbol in the groove surface farther from the p-n junction. CONSTITUTION:Phosphorus is diffused on the surface of a silicon wafer to form a high density n type collector layer 2, boron is then diffused to form a p type base layer 3, an n type emitter layer 4 and an n type layer 13 are formed therein, and a groove 7 is formed. An SiO2 film 92 is formed on the inner surface of the groove 7, a window is opened at the p-n junction side, and a glass film 91 is bonded. The impurity density is relatively increased in the prescribed distance from the exposed surface of the p-n junction, and the impurity density is set at zero or at reverse symbol at the groove surface farther from the p-n junction. Thus, the withstand voltage which is in the vicinity of an ideal withstand voltage can be obtained.
JP7563080A 1980-06-06 1980-06-06 Semiconductor device Pending JPS572564A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7563080A JPS572564A (en) 1980-06-06 1980-06-06 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7563080A JPS572564A (en) 1980-06-06 1980-06-06 Semiconductor device

Publications (1)

Publication Number Publication Date
JPS572564A true JPS572564A (en) 1982-01-07

Family

ID=13581748

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7563080A Pending JPS572564A (en) 1980-06-06 1980-06-06 Semiconductor device

Country Status (1)

Country Link
JP (1) JPS572564A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01186629A (en) * 1988-01-14 1989-07-26 Rohm Co Ltd Manufacture of mesa-type semiconductor device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01186629A (en) * 1988-01-14 1989-07-26 Rohm Co Ltd Manufacture of mesa-type semiconductor device

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