JPS5743452A - Mounting structure for integrated circuit substrate - Google Patents

Mounting structure for integrated circuit substrate

Info

Publication number
JPS5743452A
JPS5743452A JP55119982A JP11998280A JPS5743452A JP S5743452 A JPS5743452 A JP S5743452A JP 55119982 A JP55119982 A JP 55119982A JP 11998280 A JP11998280 A JP 11998280A JP S5743452 A JPS5743452 A JP S5743452A
Authority
JP
Japan
Prior art keywords
substrate
integrated circuit
circuit substrate
stress
conductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP55119982A
Other languages
Japanese (ja)
Inventor
Shuhei Iwade
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP55119982A priority Critical patent/JPS5743452A/en
Publication of JPS5743452A publication Critical patent/JPS5743452A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/67—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their insulating layers or insulating parts
    • H10W70/68—Shapes or dispositions thereof
    • H10W70/682—Shapes or dispositions thereof comprising holes having chips therein
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/072—Connecting or disconnecting of bump connectors
    • H10W72/07251—Connecting or disconnecting of bump connectors characterised by changes in properties of the bump connectors during connecting
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H10W72/251—Materials

Landscapes

  • Wire Bonding (AREA)
  • Lead Frames For Integrated Circuits (AREA)

Abstract

PURPOSE:To absorb stress due to heat expansion by connecting the respective electrodes of a package substrate to the respective electrodes of an integrated circuit substrate by an elastic rod-shaped conductor. CONSTITUTION:The respective electrodes 2 of a package substrate 1 are connected to the respective corresponding electrodes 4 of an integrated circuit substrate 3 with solder 5 or the like by an elastic rod-shaped conductor 6. When the substrate 3 is heated in its operating state and lateral stress occurs at the electrode 4 in the vicinities of both ends of the substrate 3 due to the differences of the temperature and heat expansion coefficient between the substrates 1 and 3, the stress can be absorbed by the elasticity of the conductor 6, and unreasonable stress cannot be applied to the wire in the vicinity of the electrode. The heat dissipating effect of the substrate 3 can be enhanced by blowing air to the space formed by the conductor 6.
JP55119982A 1980-08-28 1980-08-28 Mounting structure for integrated circuit substrate Pending JPS5743452A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP55119982A JPS5743452A (en) 1980-08-28 1980-08-28 Mounting structure for integrated circuit substrate

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP55119982A JPS5743452A (en) 1980-08-28 1980-08-28 Mounting structure for integrated circuit substrate

Publications (1)

Publication Number Publication Date
JPS5743452A true JPS5743452A (en) 1982-03-11

Family

ID=14774975

Family Applications (1)

Application Number Title Priority Date Filing Date
JP55119982A Pending JPS5743452A (en) 1980-08-28 1980-08-28 Mounting structure for integrated circuit substrate

Country Status (1)

Country Link
JP (1) JPS5743452A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6156439A (en) * 1984-03-19 1986-03-22 トリロジ−・コンピユ−タ−・デイベロツプメント・パ−トナ−ズ・リミテツド Semiconductor chip module
JPH0189752U (en) * 1988-12-08 1989-06-13
EP0792463A4 (en) * 1994-11-15 1998-06-24 Formfactor Inc MOUNTING OF FLEXIBLE ELEMENTS ON SEMICONDUCTOR DEVICES AND TEST METHODOLOGY APPLICABLE TO WAFERS
KR100416838B1 (en) * 2001-06-29 2004-02-05 주식회사 하이닉스반도체 Package device of semiconductor and method for manufacturing same

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6156439A (en) * 1984-03-19 1986-03-22 トリロジ−・コンピユ−タ−・デイベロツプメント・パ−トナ−ズ・リミテツド Semiconductor chip module
JPH0189752U (en) * 1988-12-08 1989-06-13
EP0792463A4 (en) * 1994-11-15 1998-06-24 Formfactor Inc MOUNTING OF FLEXIBLE ELEMENTS ON SEMICONDUCTOR DEVICES AND TEST METHODOLOGY APPLICABLE TO WAFERS
KR100416838B1 (en) * 2001-06-29 2004-02-05 주식회사 하이닉스반도체 Package device of semiconductor and method for manufacturing same

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