JPS5758352A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JPS5758352A
JPS5758352A JP55132862A JP13286280A JPS5758352A JP S5758352 A JPS5758352 A JP S5758352A JP 55132862 A JP55132862 A JP 55132862A JP 13286280 A JP13286280 A JP 13286280A JP S5758352 A JPS5758352 A JP S5758352A
Authority
JP
Japan
Prior art keywords
layer
mask
film
psg
photoresist
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP55132862A
Other languages
Japanese (ja)
Other versions
JPH0136256B2 (en
Inventor
Katsumi Ogiue
Toshio Hayashi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
NTT Inc
Original Assignee
Hitachi Ltd
Nippon Telegraph and Telephone Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd, Nippon Telegraph and Telephone Corp filed Critical Hitachi Ltd
Priority to JP55132862A priority Critical patent/JPS5758352A/en
Publication of JPS5758352A publication Critical patent/JPS5758352A/en
Publication of JPH0136256B2 publication Critical patent/JPH0136256B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0112—Integrating together multiple components covered by H10D8/00, H10D10/00 or H10D18/00, e.g. integrating multiple BJTs
    • H10D84/0116—Integrating together multiple components covered by H10D8/00, H10D10/00 or H10D18/00, e.g. integrating multiple BJTs the components including integrated injection logic [I2L]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/02—Manufacture or treatment characterised by using material-based technologies
    • H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe

Landscapes

  • Bipolar Integrated Circuits (AREA)
  • Bipolar Transistors (AREA)

Abstract

PURPOSE:To reduce the mask-matching process as well as to contrive to improve integration for the subject semiconductor device by a method wherein a desired introduction of inpurities is performed by masking an aperture witha photoresist or PSG alternately using a common Si3N4 mask having an aperture, to be used for the diffusion of the base and emitter of an injector and a driver in I<2>L. CONSTITUTION:The Si3N4 mask 6 is formed on the N<+> epitaxial layer 4 on the Si substrate 1 having an N<+> buried layer 3. The epitaxial layer 4 is etched, an ion is implanted, isolated by a P type layer 8 and an oxide film 9 is superposed. The mask 6 and an SiO25 are removed by etching, a new SiO210 and an Si2N411 are laminated and apertures 12-14 are provided on the film 11. Subsequently, a P<+> layer 16 and a P layer 17 and an N<+> layer 22, to be formed in the inner part of the P layer 17, are formed in the N<-> region isolated by the N<+> layer 20 as prescribed by providing a photoresist 15 and PSG 19 alternately, by performing an ion implantation through the film 10, and by performing an annealing and beating-out work. According to this constitution, the mask-matching process is reduced and a highly integrated I<2>L memory having uniform characteristics and high efficiency can be formed.
JP55132862A 1980-09-26 1980-09-26 Manufacture of semiconductor device Granted JPS5758352A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP55132862A JPS5758352A (en) 1980-09-26 1980-09-26 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP55132862A JPS5758352A (en) 1980-09-26 1980-09-26 Manufacture of semiconductor device

Publications (2)

Publication Number Publication Date
JPS5758352A true JPS5758352A (en) 1982-04-08
JPH0136256B2 JPH0136256B2 (en) 1989-07-31

Family

ID=15091268

Family Applications (1)

Application Number Title Priority Date Filing Date
JP55132862A Granted JPS5758352A (en) 1980-09-26 1980-09-26 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPS5758352A (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2003033306A (en) * 2001-07-24 2003-02-04 Sanyo Electric Co Ltd Sucking instrument for floor for vacuum cleaner
US8387207B2 (en) 2009-07-16 2013-03-05 Dyson Technology Limited Surface treating head
US8387206B2 (en) 2009-07-16 2013-03-05 Dyson Technology Limited Surface treating head
US8424157B2 (en) 2009-06-17 2013-04-23 Dyson Technology Limited Tool for a surface treating appliance
US8468647B2 (en) 2009-03-12 2013-06-25 Dyson Technology Limited Surface treating head

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5470781A (en) * 1977-11-16 1979-06-06 Nippon Telegr & Teleph Corp <Ntt> Semiconductor device and its manufacture
JPS5474381A (en) * 1977-11-25 1979-06-14 Nec Corp Manufacture of injection type logic circuit
JPS5556644A (en) * 1978-10-20 1980-04-25 Toshiba Corp Manufacture of semiconductor integrated circuit

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5470781A (en) * 1977-11-16 1979-06-06 Nippon Telegr & Teleph Corp <Ntt> Semiconductor device and its manufacture
JPS5474381A (en) * 1977-11-25 1979-06-14 Nec Corp Manufacture of injection type logic circuit
JPS5556644A (en) * 1978-10-20 1980-04-25 Toshiba Corp Manufacture of semiconductor integrated circuit

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2003033306A (en) * 2001-07-24 2003-02-04 Sanyo Electric Co Ltd Sucking instrument for floor for vacuum cleaner
US8468647B2 (en) 2009-03-12 2013-06-25 Dyson Technology Limited Surface treating head
US8544145B2 (en) 2009-03-12 2013-10-01 Dyson Technology Limited Surface treating head
US8424157B2 (en) 2009-06-17 2013-04-23 Dyson Technology Limited Tool for a surface treating appliance
US8387207B2 (en) 2009-07-16 2013-03-05 Dyson Technology Limited Surface treating head
US8387206B2 (en) 2009-07-16 2013-03-05 Dyson Technology Limited Surface treating head

Also Published As

Publication number Publication date
JPH0136256B2 (en) 1989-07-31

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