JPS58148663A - Synchronizing signal generator for power source - Google Patents

Abstract

PURPOSE:To eliminate the supply of a noise which is superposed on an AC voltage signal to a phase synchronizing circuit by gradually reducing the passing period of the AC voltage signal when a signal which indicates a start of removing an external noise is supplied. CONSTITUTION:A signal of a zero cross detector 4 is supplied to a phase synchronizing circuit 13 to obtain a pulse signal which is synchronized with the phase of an AC voltage, thereby controlling a thyristor converter or the like. At this time a lamp function generator 10 which generates a triangular signal synchronized with the output of the circuit 13 is provided, the output is compared with the output of a reference signal generator 12 which gradually varies the output level as the time when the signal S12 for indicating the start of removing the external noise is applied is elapsed, thereby opening or closing a gate 5. Accordingly, even if the noise is superposed on the AC voltage, the phase of the output synchronizing pulse can be coincided with that of the AC voltage.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a power synchronization signal generation circuit that generates a synchronization pulse signal synchronized with, for example, an AC voltage output from an AC power supply, and in particular, the present invention relates to a power synchronization signal generation circuit that generates a synchronization pulse signal synchronized with an AC voltage output from an AC power supply. The nine power supply synchronization signal generation circuits are designed to prevent malfunctions of '1 kvh.

Generally, when driving a motor using a thyristor converter or the like, the thyristor converter is The conduction angle of each thyristor provided in the motor is controlled to control the rotational speed of the motor. Figure 1 is a block diagram showing an example of the configuration of a power synchronization signal generation circuit that supplies a synchronization pulse signal to such a thyristor converter.
FIG. 3 is a waveform diagram for explaining the figure. In Figure 1, 1
is an AC voltage signal S1 (second
This is a zero-crossing detection circuit that detects the zero-crossing point in the figure (see (a)), and when this zero-crossing detection circuit 1 detects the zero-crossing point, it outputs a pulse signal S2 (see Fig. 2 (b)), and outputs a pulse signal S2 (see Fig. 2 (b)). (Supplied to the PLL circuit I2. Based on the pulse signal S2, the phase synchronization circuit 2
A signal S (see FIG. 2 (c)) synchronized with this pulse signal S2 is outputted and supplied to the pulse edge jetting circuit 3,
This pulse edge detection circuit 3 detects the rising and falling edges of the signal S3, and the resulting synchronizing pulse signal S4 (see FIG. 2) is supplied to a thyristor converter (not shown).

By the way, the AC voltage signal β□ supplied to such a power synchronization signal generation circuit is normally 1K, which is supplied from a power line in a factory where electric motors etc. are installed. The AC voltage signal S1 is superimposed with a lot of noise and is distorted as shown in FIG.
1 may become out of sync. For this reason, conventionally, a filter has been inserted between the power line and the power synchronization signal generation circuit, and this filter has been used to prevent noise that is superimposed on the AC voltage signal supplied from the power supply line from entering the power synchronization signal generation circuit. The power supply synchronization signal generation circuit is designed to prevent malfunction. However, in this case, if the filter is misadjusted and the phase of the signal input to the filter and the signal output from the filter are out of phase, the phase of the synchronization pulse signal output from the power supply synchronization signal generation circuit will change. Power line intersection tI/11i! There is an inconvenience that the thyristor converter malfunctions and the rotational speed of the motor fluctuates due to the phase shift of the pressure.

The present invention addresses the above points and makes the phase of the output synchronization pulse signal consistent with the phase of the AC voltage even when noise etc. are superimposed on the AC voltage of the AC power supply without using a filter or the like. The present invention provides a power synchronization signal generation circuit that can pass an AC voltage signal of an AC power source and supply it to the phase synchronization circuit before a start signal instructing to start removing disturbance noise is supplied. Control of the passing period of the AC voltage signal is started at 9 o'clock when a start signal is supplied, and the passing period is gradually reduced so that noise superimposed on the AC voltage signal is not supplied to the phase locked circuit. It is characterized by

An embodiment of the present invention will be described below with reference to the drawings.

FIG. 3 is a block diagram showing an example of the circuit configuration of a power synchronization signal generating circuit according to the present invention, and FIG. 4 is a waveform diagram for explaining the same embodiment.

In FIG. 3, 4 is a zero-cross detection circuit that detects the zero-cross point of the AC voltage signal S5, and this zero-cross detection circuit 4 detects the pulse signal (pulse of Jl) obtained when the voltage value of the AC voltage signal S5 crosses zero. Signal) S6
is supplied to the first input gate of the AND gate 5. The AND gate 5 controls the passage of the signal output from the horizontal zero cross 111m4, and is used to control the passage of the signal output from the horizontal zero cross 111m4.
1 outputs a gate open signal (111 signal) S7, the gate becomes open and the signal supplied to the first input terminal passes through and is supplied to the second input terminal of the phase comparator 6. The phase comparator 6 compares the phase of the signal S supplied to the III input terminal with the phase of the signal S8 supplied to the second input terminal. A voltage signal is generated and supplied to a low-pass filter 7, and the high-frequency component of the voltage signal applied to the low-pass filter 7 is removed and supplied to the input terminal of a voltage controlled oscillator 80.

The voltage controlled oscillator 8 is supplied to an input terminal and the oscillation frequency changes according to the voltage value of the ratio signal, and the signal S9 obtained by the oscillation is sent to the first input terminal of the phase comparator 6 and the pulse edge detection circuit. 90 input terminal and the input terminal of the ramp function generating circuit 10. The pulse edge detection circuit 9 receives the signal S supplied to its input terminal.

O is slow in rising and slow in falling (it detects pulse edge 1, and outputs a synchronous pulse signal ('1' OA pulse number 181° to the cape where the pulse edge is detected and outputs it to a thyristor converter (not shown), etc.) supply

The ramp function generating circuit 10 generates a slope when the edge of the signal S is detected and at 9 o'clock when the output terminal voltage reaches zero.
and Fi (for example, a predetermined slope corresponding to the period of the AC voltage signal S5) are switched from positive to negative and from negative to positive, thereby obtaining a good signal. S1° is supplied to the first input terminal of the voltage comparison circuit 11.

Note that here, this ramp function generating circuit 10 receives signals S,
Before is supplied, the value of the output terminal voltage becomes voltage v1
And, when the value of the output terminal voltage rises, it is made so that it does not exceed the voltage v1.

Further, 12 is a reference signal generation circuit that supplies a reference voltage to the voltage comparison circuit 11, and when this reference signal generation circuit 12 is supplied with a start signal (signal 111) S1□ instructing to start removing disturbance noise, The output terminal voltage is gradually increased from zero at a predetermined slope, thereby obtaining a good signal S13.
is supplied to the @2 input terminal of the voltage comparison circuit 11. The voltage comparison circuit 11 compares the voltage value of the signal S11 and the voltage value of the signal 81m, and the voltage value of the signal S11 is the voltage value of the signal 81m.
Gate open signal (111 signal) when the voltage value of 13 is 1 greater
S7 is outputted and supplied to the second input terminal of the AND gate 5. Here, a phase comparison circuit 6, a low-pass filter 7, an electrically controlled oscillator 8, an ELI phase synchronization circuit (PLL circuit 113), a reference signal generation circuit 12, a voltage comparison circuit 11, a ramp function generation circuit 10, and an AND gate are constructed. 5 constitutes a disturbance removal circuit that removes noise superimposed on the AC voltage signal S5.

Next, the operation of the circuit having one or more configurations will be explained separately before the start signal S1□ for starting removal of disturbance noise is input and after the start signal S1□ is input. First, start signal S1
2 is supplied, the output terminal voltage of the reference signal generating circuit 1z is zero voltage, and the output terminal voltage of the ramp function generating circuit 10 is the voltage v1. Therefore, the voltage comparator circuit 11 receives the gate open signal. output, and the AND gate 5 is kept open. In this state, zero cross detection circuit 4
When the AC voltage signal S5 is supplied to the AC voltage signal S5, the zero-cross detection circuit 4 detects the zero-cross point of the AC voltage signal S5, generates a signal S6, and supplies it to the phase synchronization circuit 13 via the AND gate 5. From this K, the 1-phase synchronization circuit 13 starts a synchronization operation, supplies the signal S obtained by this synchronization operation to the pulse edge detection circuit 9 and the ramp function generation circuit 1G, and the pulse edge detection circuit 9 sends a synchronization pulse signal S1. At the same time, the ramp function generating circuit 10 outputs a triangular waveform signal S1□. Note that immediately after the 1-phase synchronization circuit 13 starts the synchronization operation during the above-described operation, the signal S output from the phase synchronization circuit 13 is not completely synchronized with the AC voltage signal S, so the synchronization pulse signal S1 The phase and AC voltage signal
It does not match the phase of S5, and it was t. Although the waveform of the signal S11 is not a perfect triangular wave, the phase synchronization circuit 1
3 starts the synchronized operation, the phase synchronized circuit 13 performs a completely synchronized operation, so that the synchronized pulse signal S18 becomes the AC voltage signal S5.
The signal S11 is completely synchronized with the signal S11 and is a perfect triangular wave. In this state, when disturbance noise such as spike noise is superimposed on the AC voltage signal 85K as shown in FIG. S1° becomes out of synchronization with the AC voltage signal S5.

Here, in order to remove the influence of disturbance noise, when the start signal S1□C (=-) see 1 in FIG. 4 is supplied to the reference signal generation circuit 12 at timing t0 shown in FIG. 4, the voltage of the signal 813 becomes II4. It gradually rises as shown in Figure e). As a result, between timings t1 and t2, between timings t and t4, between timings t5 and t6, etc., the voltage of signal S13 changes to signal S1□C.
(see FIG. 4), the voltage comparator 11
stops outputting the gate open signal 87 (see FIG. 4 (e)) and leaves the AND gate 5 in the closed state.

Disturbance pulses P1 to P8.K superimposed on signal 86 (see FIG. 4(f)) due to disturbance noise. ...The song is signal 88 (4th
(see figure (g))). As a result, the phase synchronization circuit 13 starts the synchronization operation again and outputs the signal S (see FIG. 4(a) 1) which is synchronized with the AC voltage signal S5.

During the above-mentioned operation, the periods T1, T2, etc. during which the AND gate 5 is in the open state are large immediately after the start signals S and 2 are supplied. , due to the influence of disturbance noise, the phase of the good signal S is shifted from the phase of the AC voltage signal S5.
1 wave high point HP, HF2. , , , the phase of each zero cross of signal S6 zp , z
p2. Even if the phase is out of phase with...
Each of these zero-crossing detection pulses zp1.

zP2... can be supplied to the phase locked circuit 13.

Each of these periods T1, T2, T3...
... gradually decreases with the passage of time, so that the influence of disturbance noise can be reduced with the passage of time. Then, due to these synergistic effects, the signal S8, which is supplied to the phase locking circuit 13 after a sufficient time has elapsed after the start signal S1□ is supplied.
can be made extremely stable, and a highly accurate synchronous pulse signal S1° can be obtained.

FIG. 5 is a circuit diagram showing a specific example of the reference signal generation circuit 12 shown in FIG. In this figure, 14 is the start signal S1. ! Li2 is a resistor, and 16 is a capacitor. And here, resistance 15
and by capacitor 16.

An integrating circuit is configured to integrate the start signal S12 supplied to the terminal 14, and a good signal obtained by this integrating circuit is outputted from the output terminal 17 as a signal S13. In this case, the start signal S1□ is, for example, a power supply voltage (DC voltage) which is controlled intermittently by an on/off switch or the like.

As explained above, the power supply synchronization signal generation circuit according to the present invention includes a ramp function generation circuit that generates a triangular wave signal synchronized with the output of the phase synchronization circuit, and a ramp function generation circuit that generates a triangular wave signal synchronized with the output of the phase synchronization circuit. A reference signal generation circuit that bi-dimensionally changes one output level from the lower peak side to the higher peak side of the triangular wave with the passage of time, and the output of this reference signal generation circuit and the output of the ramp function generation circuit are compared and determined. , while the output of the ramp function generation circuit exceeds the output of the reference signal generation circuit, a comparator circuit that outputs a gate open signal, and a signal path between Since it is recommended to install a gate circuit to cut off the signal path of the wPK that is inserted and the gate signal is not output, it is possible to use it without using a filter, etc., when noise etc. are superimposed on the AC voltage from the AC power supply. Also, the phase of the synchronization pulse signal to be output and the phase of the alternating current voltage can be matched.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing a configuration example of a conventional power synchronization signal generation circuit, FIG. 2 is a waveform diagram for explaining FIG. 1, and FIG. 3 is a circuit configuration example of a power synchronization signal generation circuit according to the present invention. 4 is a waveform diagram illustrating FIG. 3, and FIG. 5 is a circuit diagram showing a specific example of the reference signal generation circuit 12 shown in FIG. 3. 4...Zero-cross detection circuit 1, 5...And gate (gate circuit) %
10...Ramp function generation circuit% 11...
... Voltage comparator circuit (comparison circuit), 12-... Reference signal generation circuit.

Claims (1)

[Claims] The zero cross detection circuit generates a pulse signal when the AC voltage of the input power source crosses the conductive voltage and supplies it to the phase synchronization circuit, and also returns the output of this phase synchronization circuit to the input side to the phase synchronization circuit. A ramp function generation circuit that generates a triangular wave signal synchronized with the output of the phase synchronization circuit by causing a power synchronization signal generation circuit to perform a synchronization operation and output a first-phase signal obtained by the synchronization operation; A criterion for gradually changing the output level from the lower peak side of the triangular wave signal to the lower peak side with the passage of time from the time when a start signal instructing the start of removal of disturbance noise is supplied.
The output of the reference signal generation circuit and the output of the ramp function generation circuit are compared and determined, and while the output of the ramp function generation circuit exceeds the output of the reference signal generation circuit, a gate open signal is generated. and a gate circuit that is inserted in a signal path between the zero-cross detection circuit and the phase synchronization circuit and quickly cuts off the signal path when the gate signal is not output. Features a power synchronization signal generation circuit.