JPS58152A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPS58152A
JPS58152A JP56098576A JP9857681A JPS58152A JP S58152 A JPS58152 A JP S58152A JP 56098576 A JP56098576 A JP 56098576A JP 9857681 A JP9857681 A JP 9857681A JP S58152 A JPS58152 A JP S58152A
Authority
JP
Japan
Prior art keywords
wiring
junction
molybdenum
programming
cutting
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP56098576A
Other languages
Japanese (ja)
Inventor
Hajime Kamioka
上岡 元
Motoo Nakano
元雄 中野
Kunihiko Wada
邦彦 和田
Noriaki Sato
佐藤 典章
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP56098576A priority Critical patent/JPS58152A/en
Publication of JPS58152A publication Critical patent/JPS58152A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B20/00Read-only memory [ROM] devices

Landscapes

  • Read Only Memory (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
  • Semiconductor Memories (AREA)

Abstract

PURPOSE:To perform programming, by cutting an Mo wiring provided near a pn junction through the selective heating and sublimating of the wiring by means of the low-power heat generation from the junction. CONSTITUTION:Layers of n, n<+> and p are formed on a p-type Si substrate, Al wiring of 3, 3' and 3'' are provided on an SiO2 film 2 by opening the films, and near the pn junction an Mo wiring 4 is provided by a method such as CVD. Heating the Mo wiring 4 in the presence of O2 or air using the heat generated by passing current in the reverse direction through the pn junction permits the Mo wiring to be sublimated and vanished, thereby completing the programming. As compared to a conventional method this constitution provides a finer PROM device with higher reliability plus lower power dissipation and also provides higher yield.

Description

【発明の詳細な説明】 本発明は、半導体装置%にビット線またはワード−配−
にモリブデンまたはタングステンg〕如き釜属材料を用
い、その近傍に設けられkpn 接合に発生する熱でモ
リブデン配線を選択的に加熱し、それを昇華させること
により配線が切れに状部にし、それによりプログラミン
グtなしたプログラム可能な絖出し専用記憶装置に関す
る・従来技術によるバイポーラプログラム可能な絖出し
専用記憶装置(FROM )の書込みなどのプログラミ
ングには、多結晶シリコン(ポリシリコン)ヒユーズ方
式と、接合降伏(ブレークダウン)方式とがある。前者
においては、ビット線また6エワード線であるポリシリ
コン配線に高電力を加え℃それを溶かすことによりポリ
シリボン配線を切断してプログラミング(畳込み)をな
すが、この方式によると溶けにポリシリコンが飛び散っ
てまわりの部品や配線に付着し、短絡の原因になるばか
りでなく信頼性な損うという欠点がある。後雀の方式に
おいては、”pm  9合に逆方向に電流1に流し、そ
れによって接合を破壊するかまkはアルミニウム配@V
蒸発させ導通な切断することKよりプログラミングtな
すが、この方式は高電力を必要とする点が問題である。
DETAILED DESCRIPTION OF THE INVENTION The present invention provides a semiconductor device with bit line or word wiring.
Using a metal material such as molybdenum or tungsten, selectively heating the molybdenum wiring with the heat generated in the kpn junction provided nearby and sublimating it, the wiring becomes a cut-shaped part. Related to programmable start-up memory without programming - Conventional bipolar programmable start-up memory (FROM) has been programmed using polycrystalline silicon (polysilicon) fuse method and junction breakdown method. (breakdown) method. In the former, programming (convolution) is performed by cutting the polysilicon wiring by applying high power to the polysilicon wiring, which is the bit line or the 6-ward line, and melting it. This has the disadvantage that it scatters and adheres to surrounding parts and wiring, not only causing short circuits but also impairing reliability. In the Gojaku method, a current of 1 is passed in the opposite direction to pm 9, thereby destroying the junction.The hook k is made of aluminum.
Although programming is better than evaporation and conductive cutting, the problem with this method is that it requires high power.

本発明の目的は従来技術にお〜・て経験される前記の問
題点を解決するKあり、かかる目的を達成するために配
線にモリブデンを用〜・、その近くに設けkpn 接合
に低電力で発生させた熱によって選択的にモリブデンを
加熱昇華しモリブデン配線を切断させることりこよりプ
ログラミングをなした一合降伏力式によるpmoMw’
FM供スb。
An object of the present invention is to solve the above-mentioned problems experienced in the prior art, and in order to achieve this purpose, molybdenum is used in the interconnection and placed near the interconnection at low power. pmoMw' is based on the combined yield force formula programmed by Riko, which selectively heats and sublimates molybdenum using the generated heat and cuts the molybdenum wiring.
FM service b.

以下、本発明の実施例を給付図面を参照して説明する。Embodiments of the present invention will be described below with reference to the drawings.

本紐の発明者は、モリブデンが#RIA写■気中まy:
は空気中で500℃以上に加熱すると酸素と反応し“〔
酸化@ (Mo5s  r Mo0aなど)トナリ、キ
ワメて短時間内VC昇華してきれいに消散する事実に注
目し、ヒント−まkはツー11モリブデン配線で徊成し
、その近<KpQ 接合を配置し、またはいいかえれば
関係するpn接合り配−にモリブデンを用−・、pn 
 接合(逆方向の電流を流しpn 接合YMLそり熱で
モリブデンを酸化昇華させ切断してプログラミングを行
う。
The inventor of this string is Molybdenum #RIA Photo:
When heated above 500℃ in air, it reacts with oxygen.
Paying attention to the fact that oxide @ (Mo5s r Mo0a, etc.) suddenly sublimates within a short time and dissipates cleanly, the hint-mak is formed in the 2-11 molybdenum wiring, and a <KpQ junction is placed near it, Or in other words, using molybdenum in the related pn junction arrangement, pn
Programming is performed by oxidizing and sublimating the molybdenum in the pn junction YML by passing a current in the opposite direction and oxidizing and sublimating the junction.

モリブデン配−を切る方法としては、モリブデン配線そ
れ目体に通電し自己加熱により昇華させることも可能で
1工あるが、そうするにはモリブデンの抵抗率がI X
 10 ’  Ωl程度以上の場合でないと実用的でな
いので、モリブデン配線な薄(しなければならな〜・、
かかる条件に適合す4特性をもつモリブデン膜は限られ
に−のである。
One way to cut the molybdenum wiring is to sublimate it by self-heating by passing electricity through the molybdenum wiring itself, but in order to do so, the resistivity of molybdenum must be I
It is not practical unless it is about 10' Ωl or more, so thin molybdenum wiring (must be done...
There are only a limited number of molybdenum films that have four characteristics that meet these conditions.

本発明の牛導体装置にお−・ては、モリブデンな熱処理
によってその抵抗率が1×10−″ Ω値としたものを
用〜・尺としても、11合における熱で七れを昇華させ
ることが可能であり、膜厚の大なるモリブデン配線を用
いても十分に昇華させ5る。
In the conductor device of the present invention, even if the resistivity is set to 1×10-'' Ω value by heat treatment with molybdenum, it is possible to sublimate it with heat at 11 degrees. is possible, and even if a molybdenum wiring with a large film thickness is used, sufficient sublimation can be achieved.

本発明の一実施例は、篤1図に断面で示されるモリフデ
ン配a!tビット線またはワード−として用いたバイポ
ーラFROM である0図にkL−”C,1はP型シリ
コン基板を、2は二酸化シリコン(liiom)M21
に示し、基板IKは聰、n+ およびpで示す拡散領域
が形成されて(・る@ 3 * 3’およびrはアルミ
ニウム配線であるが、pm  接合の近くの斜縁を付し
g部分は、スパッタリング、蒸着まkは化学気相成長(
CVD法)で形成したモリブデン配−4である。ここで
、モリブデン配Nを#嵩雰囲気にさらしまに&工空気中
においてpn  接合に逆方向電流vmすと、接合が加
熱され、その熱によってモリブデン配線4は昇華し消滅
してプログラミングがなされる。本発明の実施例におい
ては、モリブデン配INは空気中においた。
One embodiment of the present invention is a molyfdenum-containing compound shown in cross section in Figure 1. Bipolar FROM used as t bit line or word line.
, the substrate IK is formed with diffusion regions denoted by 聁, n+ and p (・ru@3*3' and r are aluminum interconnects, while the beveled edge g portion near the pm junction is Sputtering, vapor deposition or chemical vapor deposition (
This is a molybdenum metal layer 4 formed by a CVD method. Here, when the molybdenum wiring N is exposed to a bulk atmosphere and a reverse current vm is applied to the pn junction in the factory air, the junction is heated, and the molybdenum wiring 4 sublimates and disappears due to the heat, and programming is performed. . In the embodiment of the invention, the molybdenum metal IN was placed in air.

紀2図pcは本発明の他の実施例であるMOS ILA
M冗長ビットメモリが、(a)には断面図でまt;: 
(blには平向図でボされる。その(alにおいて、1
1  はp型’J ’) コニ/A&、12  kl 
5ift  Ml、 13 、13” 、 Ifはアル
;ニウム配縁、04丁ゲート電極、 GNDは接地線を
、まに執破n”  f工高一度n型不純物拡散領域k(
nぞれ示す、 15  はポリシリコン層で、それは凶
/トさrする如くn“ 型とp型にドープされて(・る
、この装aにおいては、斜線を付しに部分14はモリブ
デン配線である。かかる冗長ビットメモリは、本来のピ
ントが電気的に不良であるときそれに代るもσつとして
用意されるのであるから、そり道込みか迅速かつ正確に
なされることが要求される。
Figure 2 PC is a MOS ILA which is another embodiment of the present invention.
M redundant bit memory is shown in cross section in (a);
(bl is marked with a plan view. In (al), 1
1 is p-type 'J') Koni/A&, 12 kl
5ift Ml, 13, 13", If is aluminum interconnection, 04th gate electrode, GND is ground wire, and n"
15 is a polysilicon layer, which is doped with n" type and p type as shown in FIG. Since such a redundant bit memory is prepared as a replacement when the original focus is electrically defective, it is required that the correction be made quickly and accurately.

かかる装置において、ポリシリコン−15の接合に逆%
L流を流し接合を加熱すると、その熱でモリブデン1鹸
14  G工昇華し、アルミニウム配IIi!1rは通
電せずプログラミングがなされる。かかる操1/l−は
急速に、正確にかつきれ−・になされるので、前記しに
要求に十分答え5るものである。
In such a device, the polysilicon-15 junction is
When the joint is heated by flowing the L flow, the heat sublimates the molybdenum, and the aluminum alloy IIi! 1r is not energized and programming is performed. Such operations can be performed quickly, accurately and precisely, and therefore fully meet the requirements set forth above.

第1図と第2図に示される実施例にお(・て、モリブデ
ン配線4,140昇華のためにを工1、それぞれ7G 
+mv 、 80 myの電力が必要であった。
In the embodiment shown in Fig. 1 and Fig. 2, 4,140 molybdenum wirings were prepared for sublimation, and 7G was used for each sublimation.
+mv, 80 my of power was required.

図示の2つの実施例において、モリブデンの昇華の後に
全面に保護膜を形成し℃もよいし、まkは書込み前に既
に保S膜が形成されている場合には、当該モリブデン配
線の切断部分で保に展の展開さをなし、上記し尺如くに
モリブデン配Ailな空気にさらし加熱して昇華させた
後に、窓開きし1こ部分のまわりの保護膜なIB融して
窓をふさいでもよt・。
In the two illustrated embodiments, after sublimation of molybdenum, a protective film is formed on the entire surface and the temperature is good. The protective film around the opening of the window melts and the window is blocked. Yot.

以上に説明しに如く、本発明のth!ffiにお(・て
は、pn  接合の近(にモリブデン配線を設け、こg
)接合に逆方向mfL”i流し接合を加熱し、それによ
ってモリブデン配線を加熱し酸化し昇華し、モリブデン
配線を切断することによってF ROM 装置のプログ
ラミングを行なうのであるから、製造さnkFROM 
装置は従来のものに比べよりきれいであって装置の信頼
性を高め、かつ、消費電力は従来に比して低いものであ
るので、プpグラミ/グ用周辺回路の電流容jiiK対
する要求が緩和され且つ書込み不良が減少し、半導体装
置製造にお/ける歩留りの向上KJ4する−のである。
As explained above, the th! Place a molybdenum wiring near the pn junction in the ffi, and
) The programming of the F ROM device is performed by flowing the junction in the reverse direction mfL"i, heating the junction, thereby heating, oxidizing and sublimating the molybdenum wiring, and cutting the molybdenum wiring, so that the F ROM device is not manufactured.
The device is cleaner than the conventional ones, increasing the reliability of the device, and the power consumption is lower than the conventional ones, so the requirements for the current capacity of the peripheral circuit for programming/programming are reduced. This reduces write defects and improves yield in semiconductor device manufacturing.

なお、以上の脱明はモリブデン′/を鉤にとって説明し
kが、本発明の範囲はそれに@足されるものでな(、他
の金属例えばタングステンな用いる場合にも及ぶもので
ある。
It should be noted that although the above description of lightening has been made with reference to molybdenum, the scope of the present invention is not in addition thereto (it also extends to cases where other metals such as tungsten are used).

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本”発明の実施告であるバイポーラ?i!OM
 の断面図、第2図は本発明り−の実施列であるMO8
冗長ヒツトメモリの断面図と平面図である。 1.11・・・pmシリコン基板、2,12.IZ’・
−・810.躾、a、3’、r、ta、tr、It −
−−−f tb 4 = ’;y ムk # 。 4.14・・・モリブテン配線、!・・・ポリシリコン
層第1図 第2図
Figure 1 is a bipolar?i!OM which is an implementation notice of this invention.
FIG. 2 is a cross-sectional view of MO8, which is an implementation row of the present invention.
FIG. 2 is a cross-sectional view and a plan view of a redundant human memory. 1.11...pm silicon substrate, 2,12. IZ'・
-・810. Discipline, a, 3', r, ta, tr, It -
---ftb4=';ymuk#. 4.14...Molybdenum wiring! ...Polysilicon layer Figure 1 Figure 2

Claims (1)

【特許請求の範囲】 pll  接合の近(のビット線またはワード線配縁り
切断によりプログラム可能な記憶装置において、該pn
  接合の近くの鋏配線はモリブデンまたはタングスケ
ノの如き金属材料にて形成し、該配線【一本雰囲気また
は空気にさらし、咳p鳳 接合に逆方向電fiYfiし
てpm  接合を加熱し、その熱くより該配線km化、
昇華させて切断しプログラミングtなしたことを特徴と
する半導体装置。
Claims: In a memory device programmable by bit line or word line wiring cutting near the pll junction, the pn
The scissors wiring near the junction is made of a metal material such as molybdenum or tungsten, and the wiring is exposed to the atmosphere or air, and a reverse electric current is applied to the junction to heat the pm junction, and the heat is removed. The wiring is made into km,
A semiconductor device characterized by sublimation, cutting, and programming.
JP56098576A 1981-06-25 1981-06-25 Semiconductor device Pending JPS58152A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56098576A JPS58152A (en) 1981-06-25 1981-06-25 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56098576A JPS58152A (en) 1981-06-25 1981-06-25 Semiconductor device

Publications (1)

Publication Number Publication Date
JPS58152A true JPS58152A (en) 1983-01-05

Family

ID=14223489

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56098576A Pending JPS58152A (en) 1981-06-25 1981-06-25 Semiconductor device

Country Status (1)

Country Link
JP (1) JPS58152A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63237359A (en) * 1987-03-25 1988-10-03 Mitsubishi Electric Corp Phosphoric acid type fuel cell

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63237359A (en) * 1987-03-25 1988-10-03 Mitsubishi Electric Corp Phosphoric acid type fuel cell

Similar Documents

Publication Publication Date Title
JP3095811B2 (en) Electrically programmable non-fusible element, semiconductor device including the element, and method of forming the element
US4670970A (en) Method for making a programmable vertical silicide fuse
JP3256603B2 (en) Semiconductor device and manufacturing method thereof
US4814853A (en) Semiconductor device with programmable fuse
US4943538A (en) Programmable low impedance anti-fuse element
US20140167215A1 (en) Electronic circuit arrangement
CN100495697C (en) Fuse and method for disconnecting the fuse
JPS5829629B2 (en) Programmable semiconductor device and its manufacturing method
JPS58169940A (en) Manufacture of semiconductor device
TW561604B (en) Optically and electrically programmable silicided polysilicon fuse device
JPS6074541A (en) Semiconductor device
US5572050A (en) Fuse-triggered antifuse
JPH02153552A (en) Semiconductor element and its manufacture
JPS58152A (en) Semiconductor device
TW567603B (en) Fuse structure for a semiconductor device and manufacturing method thereof
JPH0541481A (en) Semiconductor integrated circuit
JPH0328069B2 (en)
JPS6351382B2 (en)
JPS6059678B2 (en) Programmable read-only memory device
US20030160298A1 (en) Anti-fuse and method for writing information into the anti-fuse
CN121865913A (en) Electric fuse devices and their manufacturing methods and circuits
JP3372109B2 (en) Semiconductor device
JPH0387061A (en) Semiconductor device
JPS5987736A (en) Indirectly-heated fuse
JP3012011B2 (en) Method for manufacturing semiconductor device