JPS58201330A - Formation of conductor film pattern - Google Patents

Formation of conductor film pattern

Info

Publication number
JPS58201330A
JPS58201330A JP57085849A JP8584982A JPS58201330A JP S58201330 A JPS58201330 A JP S58201330A JP 57085849 A JP57085849 A JP 57085849A JP 8584982 A JP8584982 A JP 8584982A JP S58201330 A JPS58201330 A JP S58201330A
Authority
JP
Japan
Prior art keywords
film
resin
deposited
layer
wiring
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP57085849A
Other languages
Japanese (ja)
Inventor
Toshio Sugawa
俊夫 須川
Takeshi Konuma
小沼 毅
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP57085849A priority Critical patent/JPS58201330A/en
Publication of JPS58201330A publication Critical patent/JPS58201330A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00Etching of wafers, substrates or parts of devices

Landscapes

  • Weting (AREA)
  • Manufacturing Of Electric Cables (AREA)

Abstract

PURPOSE:To obtain a conductive film at the clean surface and eliminate deterioration at the interface by providing selectively a photo sensible resin on an insulating film deposited on a substrate, and depositing a conductive film, removing the resin and leaving the conductive film at the etching area after etching the insulating film up to the interim area with said resin used as the mask. CONSTITUTION:An Si3N4 film 2 is deposited as thick as those to be removed by etching on the GaAs substrate 1 and a mask consisting of positive photo sensible resin 3 is formed at the area where a metal wiring is not provided. The substrate 1 is exposed to the CF4 plasma, the exposed part of film 2 is etched in order to remove the film as much as an increased thickness, and the surface is purified and the edge 5 of mask is extruded like a penthouse. Thereafter, the Au layer 4 is vacuum-deposited while it is discontinued at the remaining film 2 and the resin 3. The resin 3 is removed together with the upper layer 4 and thereby the Au wiring pattern 4a can be obtained. Next, an Si3N4 film 6 is deposited for obtaining a multi-layer wiring and an Au wiring 7 is again formed thereon.

Description

【発明の詳細な説明】 本発明は導電膜パターンの形成方法に関するものであり
、特にリフトオフ法に於ける金属被着前の処理に関する
ものである。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method for forming a conductive film pattern, and particularly to a treatment before metal deposition in a lift-off method.

リフトオフ法はエツチングによるパターン形成の困難な
金属に用いられる。例えば半導体基板として砒化ガリウ
ム(GaAs)基板を用い、絶縁膜としての窒化シリコ
ン(Si3N4)膜上に金(Au)の配線を施す場合次
の様にして実施されていた。
The lift-off method is used for metals that are difficult to pattern by etching. For example, when a gallium arsenide (GaAs) substrate is used as a semiconductor substrate and gold (Au) wiring is provided on a silicon nitride (Si3N4) film as an insulating film, it has been carried out as follows.

第1図に示す如(GaAs基板1表面−」二にC,V、
D法によって被着された厚さ3000人のSi3N4膜
2表面上にさらに金属配線を所望しない領域に選択的に
感光性樹脂3を被着する。ここで選択的に感光性樹脂を
被着するには感光性樹脂厚さ例えば1.4μmを回転塗
布した後所望マスクを用いて露光後現像を行うことによ
り達成される。この現像の後は感光性樹脂によって有機
溶剤あるいは水によって洗浄される。その後Au層4を
真空蒸着法等によって厚さ例えば6000八程度被着す
る。
As shown in FIG.
On the surface of the Si3N4 film 2 having a thickness of 3,000 layers deposited by method D, a photosensitive resin 3 is selectively deposited on areas where metal wiring is not desired. Here, selective application of the photosensitive resin is achieved by spin-coating the photosensitive resin to a thickness of, for example, 1.4 .mu.m, followed by exposure and development using a desired mask. After this development, the photosensitive resin is washed with an organic solvent or water. Thereafter, an Au layer 4 is deposited to a thickness of, for example, about 6,000 mm using a vacuum evaporation method or the like.

次に感光性樹脂3を溶剤によって除去することによって
感光性樹脂3表面上に被着されたAu層4も同時に除去
する。そして第2図に示す如く所望Auパターン4aを
形成する。ここで感光性樹脂3のエツジ部は急峻な程リ
フトオフを容易にするものであり、逆に傾斜が緩やかな
場合は感光性樹脂3の斜面にAu層4が破着する為溶剤
の入り込みを防げることによりリフトオフを困難とする
Next, by removing the photosensitive resin 3 with a solvent, the Au layer 4 deposited on the surface of the photosensitive resin 3 is also removed at the same time. Then, as shown in FIG. 2, a desired Au pattern 4a is formed. Here, the steeper the edge part of the photosensitive resin 3, the easier the lift-off becomes. Conversely, if the edge part of the photosensitive resin 3 is gentle, the Au layer 4 will break on the slope of the photosensitive resin 3, thereby preventing the solvent from entering. This makes lift-off difficult.

この様な方法に於ては金属被着前には有機溶剤や水によ
る洗浄のみしか行われずSi3N4膜2表面上には10
00Å以下の薄い感光性樹脂が残留しており、リフトオ
フ時にAu層4のはがれや界面劣化による信頼性の劣化
の原因となる。さらに平坦なSi3N4膜2表面上にA
u層4が60Oo人突出しており、このためさらに絶縁
膜を被着し多層配線を施す場合Au層層側側面の絶縁膜
の被着を悪してショートの原因となったり、Au層40
段差部で二層目金属配線の断線の原因となることがしば
しばであった。
In such a method, only cleaning with an organic solvent or water is performed before metal deposition, and 10% of the surface of the Si3N4 film 2 is
A thin photosensitive resin with a thickness of 00 Å or less remains, which causes deterioration in reliability due to peeling of the Au layer 4 and deterioration of the interface during lift-off. Further, on the flat surface of the Si3N4 film 2,
The U layer 4 protrudes by 6000 nm, so when an insulating film is further applied to form a multilayer wiring, the adhesion of the insulating film on the side surface of the Au layer may be poor, causing a short circuit.
The stepped portions often caused disconnections in the second layer metal wiring.

本発明は上記欠点を解決する導電膜パターンの形成方法
を提供するものである。以下本発明の実施例を図面を参
照しながら説明する。
The present invention provides a method for forming a conductive film pattern that solves the above-mentioned drawbacks. Embodiments of the present invention will be described below with reference to the drawings.

第3図に示す如(G a A s基板1上に後の工程で
エツチングする厚さ分厚くしだSi3N4膜2を厚さ6
600八程度C,V、D法で被着する0813N4膜2
上にポジタイプの感光性樹脂3としてAZ1350(商
品名)3を1.471m程度の厚さに回転塗布し、マス
クによる露光後現像液に浸漬して現像を行い、水洗する
ことによって洗浄を行う。これによって金属配線を所望
しない領域に選択的に感光性樹脂3を被着形成する。l
〜かる後CF4プラズマ中に晒すことによって樹脂層3
が被着形成されずS Z 3N4膜2が露出していた領
域のSi3N4膜2を途中迄第4図に示す如く前記厚み
に被着した分だけすなわち25oO人程度エツチングす
る。
As shown in FIG.
6008 0813N4 film 2 deposited by C, V, D method
AZ1350 (trade name) 3 as a positive type photosensitive resin 3 is spin-coated on top to a thickness of about 1.471 m, and after exposure with a mask, development is performed by immersing in a developer, and cleaning is performed by rinsing with water. As a result, the photosensitive resin 3 is selectively deposited on areas where metal wiring is not desired. l
The resin layer 3 is then exposed to CF4 plasma.
The Si3N4 film 2 in the area where the S Z 3N4 film 2 was not deposited is etched until the middle of the process, as shown in FIG.

これによって露出したS i3N4膜2の表面は前述し
た如き感光性樹脂3の残留膜も無く清浄な状態である。
As a result, the exposed surface of the Si3N4 film 2 is in a clean state without any remaining film of the photosensitive resin 3 as described above.

さらにSi3N4膜2は横方向にもエツチングされる為
樹脂3によりひさし6が形成される。
Furthermore, since the Si3N4 film 2 is etched laterally as well, a canopy 6 is formed by the resin 3.

次に第6図に示す如(A u層4を50oo八程度真空
蒸着法によって被着する。このときひさし5の下部には
Au層4のまわり込みによって150゜へ程度被着され
るが空間が形成される。そしてこのひさし5は樹脂3の
エツジ部の傾斜が多少緩やかになっていても斜面にAu
層4が被着することを防止あるいは極端に減少させるも
のである。
Next, as shown in FIG. 6, an Au layer 4 of approximately 50° is deposited by vacuum evaporation. At this time, the Au layer 4 wraps around the lower part of the eaves 5 and is deposited to approximately 150°, but there is no space. Even if the slope of the edge of the resin 3 is somewhat gentle, the eaves 5 has Au on the slope.
This prevents or significantly reduces the adhesion of layer 4.

次にアセトンあるいは感光性樹脂剥離液■−100(商
品名)に浸漬することによって樹脂3を除去しAu配線
パターン4aを第6図に示す如く形成する。ここで樹脂
3の斜面へのAu層4の被着が少なく、ひさし6による
空間さらにはS L 3N4膜2のエツチングによる段
差により露出する樹脂3を厚くしたのと同様となる為、
アセトンあるいはl−1ooによる樹脂層3の溶融を容
易にさせ、リフトオフが簡乍に出来る。
Next, the resin 3 is removed by immersing it in acetone or a photosensitive resin stripping solution 1-100 (trade name), and an Au wiring pattern 4a is formed as shown in FIG. Here, the adhesion of the Au layer 4 to the slope of the resin 3 is small, and the thickness of the resin 3 exposed due to the space created by the eaves 6 and the step difference due to the etching of the S L 3N4 film 2 becomes thicker.
The resin layer 3 can be easily melted by acetone or l-1oo, and lift-off can be easily performed.

しかる後、第7図に示す如く多層配線の為の513N4
膜6を5000人形成した後Si3N4膜6表面に二層
目の配線としてAu7を5000人選択級着する。この
時、第1層目のA u 4はエツチングされた凹部に形
成されており、Au層4の突出が小さい為Si3N4膜
6の被着は良好でありかつ第2層目の配線としてのAu
層7の断線も無くすることが出来る。
After that, as shown in Figure 7, 513N4 for multilayer wiring
After forming 5,000 layers of the film 6, 5,000 layers of Au7 are selectively deposited on the surface of the Si3N4 film 6 as a second layer wiring. At this time, the first layer Au 4 is formed in the etched recess, and since the protrusion of the Au layer 4 is small, the adhesion of the Si3N4 film 6 is good, and the Au layer 4 is formed in the etched recess.
Disconnection of the layer 7 can also be eliminated.

以上説明したように、本発明に於ては、金属等の導電膜
を被着する表面をエツチングすることによって清浄な表
面に金属被着する為密着性を良くし、界面劣化による信
頼性低下を防止するのみならず、リフトオフを容易にす
ることを可能とする。
As explained above, in the present invention, by etching the surface to which a conductive film such as metal is deposited, the metal is deposited on a clean surface, improving adhesion and reducing reliability due to interface deterioration. This not only prevents this, but also facilitates lift-off.

さらにエツチングした厚さ分だけ金属等の導電膜の突出
を減少し、平坦化を実現出来、多層配線とする場合の絶
縁物被着や二層目金属の断線を防止するものであり歩留
を向上させるものである。
Furthermore, the protrusion of the conductive film such as metal is reduced by the etched thickness, achieving flattening, and prevents insulator adhesion and disconnection of the second layer metal when making multilayer wiring, which improves yield. It is something that improves.

なお説明に於て用いた基板は他の半導体やセラミック等
でも良く絶縁物も酸化シリコンやアルミナ等でも良い。
Note that the substrate used in the explanation may be other semiconductors, ceramics, etc., and the insulator may be silicon oxide, alumina, etc.

また金属をAuの他にAl、Mo。In addition to Au, the metals are Al and Mo.

W等でも良く特に限定するものではない、また本発明を
第二層、三層目の金属配線に於ても実施可能なことは言
うまでもない。
W or the like may be used, but there is no particular limitation, and it goes without saying that the present invention can also be implemented in the second and third layer metal wiring.

【図面の簡単な説明】[Brief explanation of drawings]

第1図り図は従来の配線パターン形成方法を説明する為
の工程断面図、第3図、第4図、第5図、第6図、第7
図は本発明の一実施例にかかる配線パターンの形成方法
を示す工程断面図である。 1・・・・・・G a A a基板、2,6・・・・・
・Si3N4膜、3・・・・・・感光性樹脂、4,7・
・・・・・Au、4a・・・・・・Auパターン。 代理人の氏名 弁理士 中 尾 敏 男 ほか1名第1
図 第3図 第5図 第6図 第7図    4ζ
The first diagram is a cross-sectional view of the process for explaining the conventional wiring pattern forming method;
The figure is a process sectional view showing a method for forming a wiring pattern according to an embodiment of the present invention. 1...G a A a board, 2,6...
・Si3N4 film, 3...photosensitive resin, 4,7・
...Au, 4a...Au pattern. Name of agent: Patent attorney Toshio Nakao and 1 other person No. 1
Figure 3 Figure 5 Figure 6 Figure 7 4ζ

Claims (1)

【特許請求の範囲】[Claims] 基板上に被着された絶縁物上に選択的に感光性樹脂を被
着する工程と、前記感光性樹脂をマスクとして絶縁膜を
途中までエツチングする工程と、導電膜を被着する工程
と、前記感光性樹脂を除去して前記絶縁膜のエツチング
部に前記導電膜を残す工程とを有することを特徴とする
導電膜パターンの形成方法。
a step of selectively depositing a photosensitive resin on the insulator deposited on the substrate; a step of etching the insulating film halfway using the photosensitive resin as a mask; and a step of depositing a conductive film. A method for forming a conductive film pattern, comprising the step of removing the photosensitive resin and leaving the conductive film in the etched portion of the insulating film.
JP57085849A 1982-05-20 1982-05-20 Formation of conductor film pattern Pending JPS58201330A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP57085849A JPS58201330A (en) 1982-05-20 1982-05-20 Formation of conductor film pattern

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57085849A JPS58201330A (en) 1982-05-20 1982-05-20 Formation of conductor film pattern

Publications (1)

Publication Number Publication Date
JPS58201330A true JPS58201330A (en) 1983-11-24

Family

ID=13870316

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57085849A Pending JPS58201330A (en) 1982-05-20 1982-05-20 Formation of conductor film pattern

Country Status (1)

Country Link
JP (1) JPS58201330A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02215014A (en) * 1989-02-14 1990-08-28 Sekisui Chem Co Ltd Manufacture of anisotropic conductive ceramic complex

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02215014A (en) * 1989-02-14 1990-08-28 Sekisui Chem Co Ltd Manufacture of anisotropic conductive ceramic complex

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