JPS582042A - セグメント固定型ｌｓｉの配線パターン作成処理方法 - Google Patents

セグメント固定型ｌｓｉの配線パターン作成処理方法

Info

Publication number
JPS582042A
JPS582042A JP56098363A JP9836381A JPS582042A JP S582042 A JPS582042 A JP S582042A JP 56098363 A JP56098363 A JP 56098363A JP 9836381 A JP9836381 A JP 9836381A JP S582042 A JPS582042 A JP S582042A
Authority
JP
Japan
Prior art keywords
fixed
segment
pattern
wiring
wiring pattern
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP56098363A
Other languages
English (en)
Japanese (ja)
Other versions
JPS6366424B2 (2
Inventor
Masaki Okuda
正樹 奥田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP56098363A priority Critical patent/JPS582042A/ja
Publication of JPS582042A publication Critical patent/JPS582042A/ja
Publication of JPS6366424B2 publication Critical patent/JPS6366424B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00—Computer-aided design [CAD]
    • G06F30/30—Circuit design
    • G06F30/39—Circuit design at the physical level
    • G06F30/394—Routing
    • G06F30/3953—Routing detailed

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • Geometry (AREA)
  • Evolutionary Computation (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)
JP56098363A 1981-06-26 1981-06-26 セグメント固定型ｌｓｉの配線パターン作成処理方法 Granted JPS582042A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56098363A JPS582042A (ja) 1981-06-26 1981-06-26 セグメント固定型ｌｓｉの配線パターン作成処理方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56098363A JPS582042A (ja) 1981-06-26 1981-06-26 セグメント固定型ｌｓｉの配線パターン作成処理方法

Publications (2)

Publication Number Publication Date
JPS582042A true JPS582042A (ja) 1983-01-07
JPS6366424B2 JPS6366424B2 (2) 1988-12-20

Family

ID=14217791

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56098363A Granted JPS582042A (ja) 1981-06-26 1981-06-26 セグメント固定型ｌｓｉの配線パターン作成処理方法

Country Status (1)

Country Link
JP (1) JPS582042A (2)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6057992A (ja) * 1983-09-09 1985-04-03 株式会社日立製作所 回路素子の配置接続決定方法

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6057992A (ja) * 1983-09-09 1985-04-03 株式会社日立製作所 回路素子の配置接続決定方法

Also Published As

Publication number Publication date
JPS6366424B2 (2) 1988-12-20

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