JPS5846459A - Storage system for picture signal - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention temporarily stores image signals from an image processing device, etc.
This invention relates to a method for storing image signals in a memory for image signals sent to a video monitor or the like.

FIG. 1 is a block diagram showing a conventional example, in which the image signal that has been processed by the image processing bag [FR8, such as contour extraction and Il/light distribution discrimination, is sent as a digital signal to the memories MMI and Mg2 via the interface circuit IF. The memory IJ MMl, each having a storage capacity for one frame, is created by addressing and writing commands of the control unit CT, which is given and operates in response to a synchronization signal from the synchronization signal generator 8YG.
, are stored alternately in RIIM2.

The contents of the memory WIJ (11, Mg2) are alternately selected and read out by the selector SEL which is directly controlled by the control unit
) D/A converts it into an analog signal, and the video monitor V
M, and is displayed as an image in response to a synchronization signal from the synchronization signal generator 8YG.

Note that the interface circuit IF is connected to the image processing device PR.
The image signal is accepted in accordance with the command from the memory MMI and the PI mail 2 based on the control of the control unit CT.
It sends out image signals to.

Therefore, the image signal is memo IJ MMt , Mg2
One frame each is stored alternately and repeatedly, and these stored frames are alternately and repeatedly sent out, which results in a natural and smooth video display on the video monitor VM. It is done.

However, in the case of the configuration shown in FIG. 1, the memory ■1,
Since the image signal storage capacity for each frame is required as FirM2, it is necessary to use a memory with large capacity and high access speed.

This has the drawback that MM2 is expensive and, by extension, the entire device is expensive as well.

The present invention has an object of fundamentally solving such drawbacks of the conventional art, and provides only a memory having an image signal storage capacity for at least two fields, and divides the memory into an area for odd fields and an area for even fields. After the division, the image signal is stored in the even field area while the image signal is being sent from the odd field area, and the image signal is stored in the odd field area while the image signal is being sent out from the even field area. The present invention provides an extremely effective image signal storage system that reduces the required memory capacity by half compared to conventional methods.

The present invention will now be described in detail with reference to the block diagram of FIG. 2, which shows a practical example.

In the diagram, only the memory MM having a capacity to store image signals of at least two fields is used, and the control unit CT
In response to address designation and write commands from MM, storage of image signals in the odd field area Me and even field area M8 in the memory MM, and transfer of money by reading out the stored image deletion signal, are repeated alternately. However, the control unit CT determines whether the image signal currently being displayed on the video monitor VM is a tone field or an even field based on the Domei signal, and when the odd field is being displayed. , Elijah M for odd fields. At the same time, the image signal is sent from the area M for even fields.
During the display of an even field, the image signal is sent from the even field area 11 and Me, and the image signal is stored in the odd field area Me.

The control unit CT currently stores the area M for odd fields in the memo IJMM. Or even field minutes Elijah ■. A signal indicating whether the image is displayed is sent to the image processing device PftS via the interface circuit IF, and the device PR8 responds to this signal.

3- In order to alternately send the odd field image signal and the even field image signal, it is applied to the memory MM via the interface circuit IF', and one rear for the odd field is sent.
. Odd field image signals are stored in the even field area M8, while even field image signals are stored in the even field area M8.

Note that the image signal sent from the memory MM is
)/A into a 1 real analog signal, and then applied to the video monitor VM, where it is displayed in the same manner as in FIG.

Therefore, the storage capacity of the memory MM is halved compared to that in FIG. 1, and its price is halved, so that the cost of the device can be reduced and the same functionality as in FIG. 1 can be maintained. .

Note that the control unit CT may be configured as a counter and various logic circuits, but depending on the conditions, the signal from the control unit CT may be directly given to the image processing device pas without going through the interface circuit IF. between the interface circuit IP and the memory MM, and between the memories □MM and D.
The same effect can be achieved even if a controller or the like is inserted between the AC@D/A and the image signal is not sent to the video monitor VM, but the DAC-D/ is omitted and used as a data processing device, etc. Various modifications are possible.

As is clear from the above description, according to the present invention, the memory capacity for storing image signals is significantly reduced, and the cost of the device can be reduced while providing the same functions as conventional ones. It exhibits remarkable effects when applied to storage operations.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of a conventional example, and FIG. 2 is a block diagram showing an embodiment of the present invention. MM...Φ memory, Mo...e odd field 9
Minute area, Ma----1% number field minute area, C
T-...control unit, SYG...threat/synchronization signal generator,
PH1...fist/image processing device, VX...video monitor. Patent applicant Hitachi Electronics Co., Ltd. Agent Masaki Yamakawa (and one other person)

Claims (1)

[Claims] A memory having a capacity to store image signals of at least two fields is provided, and while the image signal is being sent from an area for odd fields of the memory, the image signal is stored in an area for even fields of the memory, and the image signal is stored from the area for the even fields. An image signal storage method characterized in that the image signal is stored in the odd field area while the signal is being transmitted.