JPS5856351A - 半導体装置の検査方法 - Google Patents

半導体装置の検査方法

Info

Publication number
JPS5856351A
JPS5856351A JP56155873A JP15587381A JPS5856351A JP S5856351 A JPS5856351 A JP S5856351A JP 56155873 A JP56155873 A JP 56155873A JP 15587381 A JP15587381 A JP 15587381A JP S5856351 A JPS5856351 A JP S5856351A
Authority
JP
Japan
Prior art keywords
electrode
measured
sealing
voltage
sealing hole
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP56155873A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0121621B2 (2
Inventor
Masanori Kuroki
黒木　正宣
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Home Electronics Ltd
NEC Corp
Original Assignee
NEC Home Electronics Ltd
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Home Electronics Ltd, Nippon Electric Co Ltd filed Critical NEC Home Electronics Ltd
Priority to JP56155873A priority Critical patent/JPS5856351A/ja
Publication of JPS5856351A publication Critical patent/JPS5856351A/ja
Publication of JPH0121621B2 publication Critical patent/JPH0121621B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P74/00—Testing or measuring during manufacture or treatment of wafers, substrates or devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages

Landscapes

  • Testing Of Individual Semiconductor Devices (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)
JP56155873A 1981-09-29 1981-09-29 半導体装置の検査方法 Granted JPS5856351A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56155873A JPS5856351A (ja) 1981-09-29 1981-09-29 半導体装置の検査方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56155873A JPS5856351A (ja) 1981-09-29 1981-09-29 半導体装置の検査方法

Publications (2)

Publication Number Publication Date
JPS5856351A true JPS5856351A (ja) 1983-04-04
JPH0121621B2 JPH0121621B2 (2) 1989-04-21

Family

ID=15615364

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56155873A Granted JPS5856351A (ja) 1981-09-29 1981-09-29 半導体装置の検査方法

Country Status (1)

Country Link
JP (1) JPS5856351A (2)

Also Published As

Publication number Publication date
JPH0121621B2 (2) 1989-04-21

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