JPS5871603A - Manufacturing method of thin film thermistor - Google Patents
Manufacturing method of thin film thermistorInfo
- Publication number
- JPS5871603A JPS5871603A JP56170383A JP17038381A JPS5871603A JP S5871603 A JPS5871603 A JP S5871603A JP 56170383 A JP56170383 A JP 56170383A JP 17038381 A JP17038381 A JP 17038381A JP S5871603 A JPS5871603 A JP S5871603A
- Authority
- JP
- Japan
- Prior art keywords
- thermistor
- manufacturing
- thin film
- chip
- temperature
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
【発明の詳細な説明】
本発明は絶縁性基板の一方の表面に感温抵抗体膜と電極
を形成してなる薄膜サーミスタの製造方法に関し、サー
ミヌタ素子(以下チップと称す)を高真空中で加熱処理
することにより、特性の熱的安定化を図ることを目的と
する。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method for manufacturing a thin film thermistor in which a temperature sensitive resistor film and an electrode are formed on one surface of an insulating substrate. The purpose of heat treatment is to thermally stabilize the characteristics.
一方の表面に感温抵抗体膜2と電極膜3とを形成して構
成される。絶縁性基板1には、アルミナ。It is constructed by forming a temperature sensitive resistor film 2 and an electrode film 3 on one surface. The insulating substrate 1 is made of alumina.
ムライト、ベリリア、石英、硼珪酸ガラスなどが用いら
れる。感温抵抗体膜2は、SiCの薄膜が用いられる。Mullite, beryllia, quartz, borosilicate glass, etc. are used. As the temperature sensitive resistor film 2, a thin film of SiC is used.
電極膜3には、Or 、Ni 、Ni−0rなどをアン
ダーコートしたムu 、 Cju 、 Ag などの蒸
着電極膜、あるいは五g、ムU、ムg−Pd、Pt。The electrode film 3 may be a vapor-deposited electrode film of Mu, Cju, Ag, etc., undercoated with Or, Ni, Ni-Or, etc., or a vapor-deposited electrode film of Mu, Cju, Ag, etc., or Mu, Mu, Mu-Pd, or Pt.
ムu −ptなどの厚膜電極膜が用いられる。A thick film electrode film such as mu-u-pt is used.
この種チップは、熱的影響を受けた場合、サーミスタ特
性(抵抗値ならびにサーミスタ特性)が大幅に変化する
。サーミスタ特性に及ぼす実際の熱的影響は、次の2点
が考えられる。第1にはサーミスタ製造過程におけるチ
ップ形成後のリード付は工程である。この工程はチップ
の電極部に低融点ガラス粉末の焼付をし、これを介して
リード線の接続がされる。この低融点ガラス粉末の焼付
けには700℃X5分の作業条件を要し、そのためサー
ミスタ特性は著しい熱的影響を受ける。When this type of chip is subjected to thermal influences, the thermistor characteristics (resistance value and thermistor characteristics) change significantly. The following two points can be considered as the actual thermal influence on the thermistor characteristics. First, attaching leads after chip formation in the thermistor manufacturing process is a step. In this step, low-melting glass powder is baked onto the electrodes of the chip, and lead wires are connected through this. Baking this low melting point glass powder requires working conditions of 700° C. for 5 minutes, and therefore the thermistor characteristics are significantly affected by heat.
第2にはサーミスタ実用過程における使用温度検出など
に利用されるため、最高使用温度では350℃を断続的
に受けることになる。Second, since the thermistor is used for detecting the operating temperature in the practical process, the maximum operating temperature is 350°C intermittently.
これらの熱的影響は、前者がサーミスタ製造面の歩留な
ど生産性に、後者はサーミスタの寿命や信頼性に反映し
てくる。The former is reflected in productivity such as the yield of thermistor manufacturing, and the latter is reflected in the life and reliability of the thermistor.
従来この種チップを熱的に安定化するために、チップを
予めアニーリング処理する方法が用いられていた。この
アニーリング処理は、チップの形成がおこなわれた後に
、電気炉などにより加熱処理(大気中でエージング)す
る方法で、通常700℃X20分〜3時間程度(大気中
)の条件が用いられる。なかでも、7000CX1時間
以上の条件において臣、安定化に対する効果には大差が
なく、作業時間短縮にも適することから実際の製造には
700℃×1時間の条件が用いられていた。しかし、従
来のアニーリング処理によると。Conventionally, in order to thermally stabilize this type of chip, a method of pre-annealing the chip has been used. This annealing treatment is a method of heat treatment (aging in the atmosphere) using an electric furnace or the like after the chip is formed, and conditions are usually used at 700° C. for about 20 minutes to 3 hours (in the atmosphere). Among these, the conditions of 700° C. for 1 hour or more were used in actual production because there was no significant difference in the effect on stabilization and it was suitable for shortening the working time. However, according to the traditional annealing process.
サーミスタ特性に及ぼす熱的影響をかなり抑制するとと
はできるが、その変動幅を小さくすることは困難であっ
た。従ってサーミスタ製造面での歩の欠点を有していた
。Although it is possible to considerably suppress the thermal influence on thermistor characteristics, it has been difficult to reduce the range of variation. Therefore, it had some drawbacks in terms of thermistor manufacturing.
本発明は絶縁性基板の一方の表面に感温抵抗体膜と電極
膜とを形成したチップにおいて、少なくともチップを高
真空中で加熱処理することにより上記従来の欠点を解消
するものである。以下、本発明の一実施例について詳細
に説明をする。The present invention solves the above-mentioned conventional drawbacks in a chip in which a temperature-sensitive resistor film and an electrode film are formed on one surface of an insulating substrate by heat-treating at least the chip in a high vacuum. Hereinafter, one embodiment of the present invention will be described in detail.
実施例
実験用試料には、前述したチップ構成より絶縁性基板に
純度96チのアVミナ基板(L6.6 X”1.8Xt
0.6%)、電極膜には金・白金ペーストの厚膜焼結体
、感温抵抗体膜には8iCのヌバッタ蒸着膜(2,6μ
m厚さ)を選んだ。この様にして作成されたチップのサ
ーミスタ初期特性は、抵抗値(50℃で測定)が約18
0Kg、サーミスタ定数(60℃及び140”0間の値
)が約2376°にであった。The sample for the example experiment was an insulating substrate based on the chip configuration described above, and an amine substrate with a purity of 96 cm (L6.6 x 1.8 xt).
0.6%), a thick film sintered body of gold/platinum paste for the electrode film, and an 8iC Nubatta vapor-deposited film (2.6μ
m thickness) was selected. The initial characteristics of the thermistor of the chip created in this way are a resistance value (measured at 50°C) of approximately 18
0 Kg, the thermistor constant (value between 60° C. and 140”0) was approximately 2376°.
次に高真空中の加熱処理には、汎用型の真空炉(〜×1
Φ−’Torr)を用いた。加熱温度の設定は400.
500.Too 、900℃を選び、各50.60分と
した。真空圧力は真空到達圧力を3 X 10 ’ T
orrに設定し、加熱による真空度の低下を含め圧力が
5 X 105ToILr以下になる様にコントロール
をした。この様にして高真空中で加熱処理した、チップ
の抵抗値変化(於60℃測定)の関係を第2図に示した
。第2図において((イ)は400℃処理、((ロ)は
500’C’処理、(ハ)は700℃処理、に)は90
0’C処理の経時に対する抵抗値特性を示すもので、各
々には特徴のある特性i線を示すことが明らかになった
。実験では((イ)、(ロ)。Next, for heat treatment in high vacuum, a general-purpose vacuum furnace (~×1
Φ-'Torr) was used. The heating temperature setting is 400.
500. Too and 900°C were selected, and each time was 50.60 minutes. The vacuum pressure is the ultimate vacuum pressure of 3 x 10'T.
orr, and the pressure was controlled to be 5×105 ToILr or less, including the reduction in the degree of vacuum due to heating. FIG. 2 shows the relationship between the resistance value change (measured at 60° C.) of the chip heat-treated in a high vacuum in this manner. In Figure 2, ((a) is treated at 400°C, ((b) is treated at 500'C', (c) is treated at 700°C, and) is 90°C.
It shows the resistance value characteristics over time during 0'C treatment, and it has been revealed that each exhibits a characteristic i-line. In the experiment ((a), (b).
(ハ)、に)の各温度を選んだが、その間における各温
度に付いては、第2図に示した温度依存性を有した特性
曲線に類(Lしたそれぞれの特性曲線が得られることは
容易に類推することができる。(C) and (2) were selected, but for each temperature in between, it is unlikely that characteristic curves similar to (L) with temperature dependence shown in Figure 2 can be obtained. It is easy to draw an analogy.
上述の様に作成された各試料について、熱的影響の試験
をした。熱的影響の試験条件には、前述のサーミスタ製
造上の温度を考慮した700°CX10分(大気中)放
置ならびに実用上の使用温度を考慮した400’CX1
000時間(大気中)放61’−’
置を選び実施をした。この試験の前後における60℃抵
抗値および60℃−140℃間におけるサーミスタ定数
の変化率を調べ、サーミスタ特性の安定化効果に対する
評価としだ。Each sample prepared as described above was tested for thermal effects. The test conditions for thermal effects include 700°C x 10 minutes (in the atmosphere), which takes into account the above-mentioned thermistor manufacturing temperature, and 400'C x 1, which takes into account the practical use temperature.
The experiment was carried out by selecting a 61'-' exposure position for 000 hours (in the atmosphere). The 60°C resistance value before and after this test and the rate of change in the thermistor constant between 60°C and 140°C were examined to evaluate the effect of stabilizing the thermistor characteristics.
まだ、本発明の効果を比較するため、従来の加熱処理の
代表である700℃X60分(大気中)のアニーリング
処理したチップと、さらに真空条件の比較を含めた1〜
10 X 10−2TOrr範囲のの低真空域にコント
ローμされたなかで700℃X10分加熱処理をしたチ
ップを用い同じ熱的影響の試験をした。However, in order to compare the effects of the present invention, we conducted a comparison of chips annealed at 700°C for 60 minutes (in the atmosphere), which is typical of conventional heat treatment, and vacuum conditions.
The same thermal effect test was conducted using a chip that had been heat treated at 700° C. for 10 minutes in a controlled low vacuum range of 10×10 −2 TOrr.
その結果、本発明による高真空中で加熱処理されたチッ
プのサーミスタ特性は、熱的に非常に安定化することが
判った。なかでも加熱処理の温度保持時間をパラメータ
に見た場合、その安定化の効果では大きな差異は見られ
なかった。As a result, it was found that the thermistor characteristics of the chip heat-treated in a high vacuum according to the present invention were extremely stabilized thermally. In particular, when looking at the temperature holding time of heat treatment as a parameter, no significant difference was observed in the stabilizing effect.
これらの中より第2図に示すU)〜(ロ)の内で10分
間加熱保持をした系のものを代表に、従来例、ならびに
低真空域処理のものとの比較を表に示した。表−1には
Too℃×10分(大気中)放置。Among these, those in U) to (B) shown in FIG. 2 that were heated and held for 10 minutes are representative, and comparisons with conventional examples and those processed in a low vacuum region are shown in the table. Table 1 shows the temperature at Too°C for 10 minutes (in the atmosphere).
表−■には400℃×1600時間(大気中)放置によ
る熱的影響の試験結果を示している。Table 1 shows the results of a test on thermal effects caused by standing at 400°C for 1600 hours (in the atmosphere).
表−1,11からも明らかな様に、本発明の高真空中で
加熱処理されたチップのサーミスタ特性〔抵抗値(於6
0’C)変化率を△R′で、サーミスタ姫数(於6o→
140℃間)の変化率を△Bで示した〕は、熱的影響に
対し非常に安定した効果を示すことが判る。また、実用
上のサーミスタ特性の変化は、抵抗値が±6チ、サーミ
スタ定数が±2チ程度以内を必要とするが、少なくとも
500 ’C以上の高真空で加熱処理されたチップのサ
ーミスタ特性の変化率は、これを充分に満したものであ
ることが判る。また、高真空中で400℃の加熱処理を
したチッ乃ならびに低真空域で加熱処理をしたチップに
おいては、サーミスタ特性の著しい熱的安定性の結果が
得られなかった。しかし、上記のサーミスタ特性の変化
の許容範囲が広い使い方をしようとする場合では、それ
゛らの熱処理でも充分にそ0効−を果す員は明ら−か1
ある・従。As is clear from Tables 1 and 11, the thermistor characteristics [resistance value (6
0'C) The rate of change is △R', the thermistor princess number (6o→
140° C.) whose rate of change is indicated by ΔB] shows a very stable effect against thermal influences. In addition, changes in thermistor characteristics in practical use require a resistance value within ±6 inches and a thermistor constant within ±2 degrees, but changes in the thermistor characteristics of chips heat-treated in a high vacuum of at least 500'C or higher are necessary. It can be seen that the rate of change satisfies this requirement. Furthermore, in the chips heat-treated at 400° C. in a high vacuum and the chips heat-treated in a low vacuum region, remarkable thermal stability of the thermistor characteristics could not be obtained. However, if the above-mentioned use is intended to have a wide permissible range of change in the thermistor characteristics, it is clear that such heat treatment will not be effective enough.
There is/obey.
て互換性に優れた薄膜サーミスタの製造が可能となっだ
結果、歩留の向上の実現。さらには熱的安定性が向上し
た結果、安定した信頼性が得られる。As a result, it has become possible to manufacture thin film thermistors with excellent compatibility, resulting in improved yields. Furthermore, as a result of improved thermal stability, stable reliability can be obtained.
また、今回の実験では、加熱処理温度をMムX900℃
にしているが、これはチップの電極材料の耐熱性の点か
らこの温度設定がなされたためで当然その電極材料の構
成で温度範囲が変ることは容易に類推できることである
。In addition, in this experiment, the heat treatment temperature was set to 900°C.
This is because this temperature setting was made from the viewpoint of the heat resistance of the electrode material of the chip, and it can be easily inferred that the temperature range changes depending on the configuration of the electrode material.
以上の説明から明らかなように、本発明のチップを高真
空中で加熱処理することにより、サーミスタ特性の優れ
た熱的安定性が図れ、サーミスタ製造上の歩留の向上、
信頼性や向上等の効果が得られるものである。As is clear from the above explanation, by heat-treating the chip of the present invention in a high vacuum, excellent thermal stability of the thermistor characteristics can be achieved, and the yield of thermistor manufacturing can be improved.
Effects such as reliability and improvement can be obtained.
第1図は本発明のなかの実験に使用したサーミスタ素子
(チップ)を模式的に示す断面図、第2図はチップを高
真空中で加熱処理したときの抵抗値(於60℃)と時間
の関係を示す図である。
1・・・・・・絶縁性基板、2・・・・・・感温抵抗体
膜、3・・・・・・電極膜。
代理人の氏名 弁理士 中 尾 敏 男 ほか1名第1
図
第2図
TIME trni*)→Figure 1 is a cross-sectional view schematically showing the thermistor element (chip) used in experiments in the present invention, and Figure 2 shows the resistance value (at 60°C) and time when the chip was heat-treated in a high vacuum. FIG. 1... Insulating substrate, 2... Temperature sensitive resistor film, 3... Electrode film. Name of agent: Patent attorney Toshio Nakao and 1 other person No. 1
Figure 2 TIME trni*)→
Claims (3)
とを形成してサーミヌタ素子を作り、その後、このサー
ミヌタ素子を高真空中で加熱処理する薄膜サーミスタの
製造方法。(1) A method for manufacturing a thin film thermistor, in which a therminuta element is formed by forming a temperature-sensitive resistor film and an electrode film on one surface of an insulating substrate, and then the therminuta element is heat-treated in a high vacuum.
ある特許請求の範囲第1項記載の薄膜サーミヌタの製造
方法。(2) The method for manufacturing a thin film therminuta according to claim 1, wherein the vacuum pressure is at least 6×10 Torr or less.
範囲である特許請求の範囲第1項記載の薄膜サーミスタ
の声遣方法。(3) The method of voicing a thin film thermistor according to claim 1, wherein the heat treatment temperature is at least in the range of SOO°C to 900°C.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP56170383A JPS5871603A (en) | 1981-10-23 | 1981-10-23 | Manufacturing method of thin film thermistor |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP56170383A JPS5871603A (en) | 1981-10-23 | 1981-10-23 | Manufacturing method of thin film thermistor |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5871603A true JPS5871603A (en) | 1983-04-28 |
| JPS6252924B2 JPS6252924B2 (en) | 1987-11-07 |
Family
ID=15903911
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP56170383A Granted JPS5871603A (en) | 1981-10-23 | 1981-10-23 | Manufacturing method of thin film thermistor |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5871603A (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS63310101A (en) * | 1987-06-12 | 1988-12-19 | Nok Corp | Manufacture of thin-film thermistor |
| JPH04105304A (en) * | 1990-08-23 | 1992-04-07 | Murata Mfg Co Ltd | Electrode forming method of porcelain semiconductor element |
| JPH04105303A (en) * | 1990-08-23 | 1992-04-07 | Murata Mfg Co Ltd | Electrode forming method of porcelain semiconductor element |
Families Citing this family (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7115902B1 (en) | 1990-11-20 | 2006-10-03 | Semiconductor Energy Laboratory Co., Ltd. | Electro-optical device and method for manufacturing the same |
| US5849601A (en) | 1990-12-25 | 1998-12-15 | Semiconductor Energy Laboratory Co., Ltd. | Electro-optical device and method for manufacturing the same |
| US7576360B2 (en) | 1990-12-25 | 2009-08-18 | Semiconductor Energy Laboratory Co., Ltd. | Electro-optical device which comprises thin film transistors and method for manufacturing the same |
| US7098479B1 (en) | 1990-12-25 | 2006-08-29 | Semiconductor Energy Laboratory Co., Ltd. | Electro-optical device and method for manufacturing the same |
-
1981
- 1981-10-23 JP JP56170383A patent/JPS5871603A/en active Granted
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS63310101A (en) * | 1987-06-12 | 1988-12-19 | Nok Corp | Manufacture of thin-film thermistor |
| JPH04105304A (en) * | 1990-08-23 | 1992-04-07 | Murata Mfg Co Ltd | Electrode forming method of porcelain semiconductor element |
| JPH04105303A (en) * | 1990-08-23 | 1992-04-07 | Murata Mfg Co Ltd | Electrode forming method of porcelain semiconductor element |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS6252924B2 (en) | 1987-11-07 |
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