JPS5875206A - Digital process controller - Google Patents

Abstract

PURPOSE:To reduce the cost of the hardware and to realize a fail-safe system, by multiplexing a central arithmetic processing unit and having a software-like process for switch of a normal output. CONSTITUTION:A double structure is secured for a central arithmetic processing unit CPU. Both CPU-A system 5 and CPU-B system 6 perform the processes on the basis of the data given from analog input devices 3 and 4 and digital input devices 11 and 12 respectively. Each CPU always has a self-diagnosis. If a fault is detected through the self-diagnosis, the fault signal is set at ''1''. A logic circuit 90 performs a logic operation based on the fault signal and controls the digital input device. As a result, the normal CPU is selected at all times, and no output is produced when both systems A and B are faulty.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a digital process control device in which central processing units (CPUs) are multiplexed.
This relates to the bumpless switching system of the U system.

A conventional device of this type is shown in FIG. In the figure, (1) is a process, and (2) is a control device for controlling this process. (3) and (4) are analog input devices that convert analog control input signals from process (1) into digital; (1) and (83 are central processing units (hereinafter referred to as CPU)) from (5) and (6). An analog output device that converts digital signals into analog signals, Q (> is a switch that selectively switches signals from the analog output devices (7) and (8), and (r,
) is a duplicated single system CPU (hereinafter referred to as 1" CPU-A system), which reads control input signal values from an analog input device (3), performs arithmetic processing, and outputs them to an analog output device (7). Similarly, (6) is the other duplicated CPU
The CPU-B system (hereinafter referred to as CPU-B system) reads the control input value from the analog input device (4) and performs arithmetic processing on the analog output device (
8).

The failure detection signals of the CPU-A system (5) and CPIJ-B system (6) are input to the logic circuit (9). The output of the logic circuit (9) is input to switch 01 and is used as a signal to select the position of switch 00.

Next, the operation will be explained. The CPU-A system (5) reads the process (1) through the analog human power device (3).
The control calculation is performed based on the control input signal value from the switch 01, and the calculation result is sent to the switch 01 via the analog output device (7).
tell. Similarly, the CPU-B system (6) performs control calculations based on the control input signal value from the process (1) read through the analog input device (4), and outputs the signal through the analog output device (8). Transmit the calculation results to the switch 00. Since the CPU-A system (5) and the CPU-B system ((j) perform exactly the same calculation, the calculation results are exactly the same as long as both CPU systems are normal.

The CPU-A system (5) frequently performs self-diagnosis, and if an abnormality is found as a result of the diagnosis, it turns on the CPIJ-A thread failure signal.Similarly, the CPU-B system (6) also constantly performs self-diagnosis. If an abnormality is found during this process, the CPU-B thread failure signal is turned ON. 70 thick circuit (9) is the above CPU
Input fault 1 I7, process any CPU output (]
) and outputs the result to switch 01. Switch 01 switches according to the output of the logic circuit (9) and selects the CPU output.

For example, if both CPU systems are normal, the logic circuit (9) instructs the switch a1 to maintain the status quo. Also, if the CPU-A thread failure signal turns ON, the CPU-A
When the B thread failure signal turns ON, it instructs the switch (117) to select A, and when both CI'U fail, disconnects the switch (Il'l from the partner system and returns the control output to the current state. Perform operations to maintain it.

Therefore, in a device like the first pin, the CPU U-A system (5),
If any of the CPU-B systems (6) is normal, it is possible to control the plant without any interference, so the reliability of the entire system can be increased.

However, in conventional digital process control equipment, equipment redundancy is configured as described above, so C
Hardware (for example, switch Off) is required to switch the output of PUs (5) and (6), and the reliability of the entire device depends on the reliability of the switching hardware, making it extremely reliable. Especially in control systems with a large number of analog output points, it is difficult to design the switching hardware and the cost is high.

This invention was made to eliminate the drawbacks of the conventional ones as described above, and provides a redundant digital process control device that does not require switching hardware by switching the output of the CPU using software. The purpose is

An embodiment of the present invention will be described below with reference to the drawings. Second
In the figure, (1) is a process, and (e) is a control device for controlling this process. (3) and (4) are analog input devices that convert analog control input signals from process (1) into digital, 0◇, (a) are digital input devices that input and process digital input values, and Q 葎 is a CPU.
This is an analog output device that converts digital signals from a computer into analog signals. The analog output device 03 has a so-called 2-port interface with the CPU.
It can be accessed from both the UA system (5) and the CPU-B system (6).

(5) is a duplicated single-system CPU CPU-A system that reads the control input signal value from the analog input device (3), performs arithmetic processing, and outputs the logic circuit read by the digital input device 0υ. output to the analog output device (to) according to the following. Similarly, (6) is the other duplicated CPU system, CPU-B, which reads the control input signal value from the analog input device (4), and after arithmetic processing, it is read by the digital input device (A). Output to analog output device (to) according to the output of the logic circuit.

The CPU-λ system (5) and CPU-B system (6) are constantly performing self-diagnosis processing, and if an abnormality is detected, they will output a CPU-A system abnormal signal and a CPU-B system abnormal signal, respectively.
’. The logic circuit performs logical operations based on these abnormal signals and supplies its output to digital input device 0 (6).

Next, the operation will be explained.

The CPU-A system (5) and CPU-B system (6) are analog input devices (3), (4) and digital input device 01),
Arithmetic processing is performed according to the analog input value and digital input value read from Q'4, and FIGS. 8 and 4 are flowcharts of the software.

FIG. 8 shows the software of the CPU-A system (5). CPU system (5) performs analog input reading processing 0])
After performing the control calculation process (a), the output data to be output to the analog output device 0 is calculated. However, actual output operation is not performed at this point.

Next, digital input reading processing (g) is executed to read the output values (A-system control request signal, B-system control request signal) of the logic circuit m. The judge (b) indicates that the A system control request signal is 1.
', and if it is Off, jump to the beginning of the software and repeat the above process. Conversely, if it is '1', it is determined by the determiner (to) whether or not the B system control request signal is '1', and if it is '1', it jumps to the beginning of the software and repeats the above processing.

On the other hand, if it is 0', the analog output process (to) is executed, and after outputting the calculation result of the control calculation process C) to the analog output hardware 0Φ, the process jumps to the beginning of the software and repeats the above process. In other words, the CPU-A system (5) always performs control calculations, but only when the output values for the logic circuit become the A-system control request signal -1 and the B-system control request signal -0, the analog output device 0 is activated. : Outputs the calculation result for 4.

FIG. 4 shows the software of the CPU-B system (6).

Analog input reading processing C■, control calculation processing (6),
Digital input reading processing θ field is CPU-A system (5)
It's doing exactly the same thing. However, the judge ■, to)
is different from that of the CPU U-A system, and the CPU
The B system (6) outputs the calculation result to the analog output device 0 only when the output value for the logic circuit becomes the A system control request signal -0 and the B system control request signal -1.

FIG. 5 shows an example of the circuit configuration of the logic circuit (a). In the figure, 151), [ is a NOT circuit,
The state indicates an AND circuit.

Table 1 Table 1 is a truth table for the logic shown in Figure 5.
As long as the U-A system abnormal signal is ``0'', the A system control request signal is -1, the B system control request signal is -0, and the CPU-A system (5) sends the calculation result to the analog output device α [present]. Next, if the CPTJ-A system abnormal signal is '1' and the CPU
- When the B-system abnormal signal is 4'θ'.

A system control request signal - ○, B system control request signal - 1 becomes C
, PU-B system outputs the calculation result to the analog output device 03. Furthermore, when the CPU-A system abnormal signal and CPU-B system abnormal signal both become '1', both the A system control request signal and the B system control request signal become 50', and any CPU
Analog output processing is no longer performed from U, and the control output remains as it is.

In addition, the logic circuit (A system control request signal due to an abnormality in the column,
Even if both of the B-system control request signals become ``'']'', the analog output processing is similarly not performed, so the control output remains as it is.

In the above embodiment, a case was explained in which the CPUs (5) and (6) are a dual digital control device, but the above embodiment may also be a triple or even multiplex digital control device. It has the same effect as. In short, it is applicable to at least a duplex multiple system.

As described above, according to the present invention, since the conventional hardware-based switching of control outputs is replaced with a software-based judge, switching hardware is not required, making the device inexpensive and highly reliable. In addition, since interlocks related to OFF (ON) can be configured in software, complex interlock logic can be implemented without adding special hardware.Furthermore, it is easy to design a fail-safe design against logic circuit troubles. , and other effects.

[Brief explanation of drawings]

FIG. 1 is a hardware configuration diagram showing a conventional redundant digital control device, FIG. 2 is a hardware configuration diagram showing a redundant digital control device according to the present invention, and FIG. 3 is a hardware configuration diagram showing a redundant digital control device according to the present invention. FIG. 4 is a diagram showing a software flowchart of the CPU system according to the present invention.
FIG. 5 is a circuit diagram showing an example of a logic circuit according to the present invention. (1)・・・・・・Process, (2), (e)・
......Control device, (3), (4)...
...Analog input device, (5)...
CPU-A system, (6)...CPU-B system, (7), (8), (11......Analog output device, (9), - ......Logic circuit. In each figure, the same reference numerals indicate the same or corresponding parts. Agent Makoto Kuzuno - Figure 1 Figure 3 Figure 11

Claims (1)

[Claims] In a digital process control device having a central processing unit A1 and a central processing unit B that receive control inputs from the process (and process control outputs to be output to the process), the central processing unit A and the central processing unit A multi-port input/output device that receives the control output of processing unit) B and supplies it to the above process, inputs abnormal signals from the central processing unit A - and central processing unit B, and connects it to a healthy central processing unit) A or A digital process control device comprising a logic circuit that allows a central processing unit B to generate a control output.