JPS5893215A - Manufacture of semiconductor singlecrystal thin film - Google Patents
Manufacture of semiconductor singlecrystal thin filmInfo
- Publication number
- JPS5893215A JPS5893215A JP56190617A JP19061781A JPS5893215A JP S5893215 A JPS5893215 A JP S5893215A JP 56190617 A JP56190617 A JP 56190617A JP 19061781 A JP19061781 A JP 19061781A JP S5893215 A JPS5893215 A JP S5893215A
- Authority
- JP
- Japan
- Prior art keywords
- film
- singlecrystal
- substrate
- layer
- semiconductor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/01—Manufacture or treatment
- H10D84/02—Manufacture or treatment characterised by using material-based technologies
- H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
- H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D88/00—Three-dimensional [3D] integrated devices
- H10D88/01—Manufacture or treatment
Landscapes
- Recrystallisation Techniques (AREA)
Abstract
Description
【発明の詳細な説明】
発明の属する技術分野
本発明は半導体単結晶表面の一部に存在する絶縁性膜上
に、半導体単結晶表面から単結晶半導体薄膜を成長させ
る構造の製造方法に関する。DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a method for manufacturing a structure in which a single crystal semiconductor thin film is grown from a semiconductor single crystal surface on an insulating film existing on a part of the semiconductor single crystal surface.
従来技術とその問題点
絶縁部板上の単結晶薄膜はSO8(サファイア上のシリ
コン)の例でもわかるように次(て述べるような利点を
有する。すなわち■1′#嘆を島状に分離し又は誘電体
分離により素子間の分離が容易かつ完全(で出来ろ。1
2)このm1Ia上17r MOSインバータ回路を作
るときけ基板バイアス効果がないことからスイッチング
速tWが大きい。■寄生浮遊零敗が小さく高速化がはか
れる等である。Prior art and its problems Single crystal thin films on insulating plates have the following advantages, as can be seen in the example of SO8 (silicon on sapphire). Or, isolation between elements can be easily and completely achieved by dielectric isolation.
2) When making this m1Ia 17r MOS inverter circuit, the switching speed tW is high because there is no substrate bias effect. ■ Parasitic floating zero failure is small and high speed can be achieved.
しかしSO8では単結晶サファイアが使用されていもた
め価格が高くなることが問題点として残ってしり、この
だめ、溶融水晶板やS+ウエノ・を酸化して形成1〜だ
非晶質SiO2あるいはSiウエノ・上(で堆積しだS
iN、5i02嘆上に半導暎を(に堆積したものを使用
する試みがある。このように薄膜構造は最近発達したし
レーザアニール法によって部分的に可能になっている。However, the problem remains that SO8 uses single-crystal sapphire, which increases the price.・Top (S)
There have been attempts to use semiconductors deposited on iN, 5i02, etc. Thin film structures such as these have recently been developed and are made possible in part by laser annealing techniques.
すなわち、81を例にとると、S+嚇壱晶基板を浦化し
、’ S + 02を形成した後、この一部を除去する
ことによって開孔し、次に多結晶Siを全面的に被着し
Si基板表面から8102上まで多結晶Siを連続1〜
で延在させる。次にエネルギービームを走査照射すると
、半導体基板表面で溶融した多結晶Siは基板から液相
エピタキシャル成長によって単結晶化し、さらにビーム
の走査方向に后ってSiO2上の多晴晶もそれに引きつ
づき単結晶化されるというものである。In other words, taking No. 81 as an example, after forming an S + 02 by etching an S+ silicon crystal substrate, a hole is formed by removing a part of it, and then polycrystalline Si is deposited on the entire surface. Polycrystalline Si is continuously deposited from the surface of the Si substrate to the top of 8102.
Extend it with Next, when an energy beam is scanned and irradiated, the polycrystalline Si melted on the surface of the semiconductor substrate becomes a single crystal by liquid phase epitaxial growth from the substrate, and further, in the scanning direction of the beam, the polycrystalline Si on the SiO2 continues to become a single crystal. It is said that it will be converted into
しかしながらこのような方法で得られだ′4膜において
も次のような欠点がみられる。すなわち、ビーム出力が
低い場合、ビームの走査帯のヘリに宿って半導体基板上
のSiから8102上へ向かって条横の格子欠陥が形成
された。一方、ビーム出力を高くしてゆくと、S ’
02上のSi鳴衣表面荒れる現象が堅られろ。このよう
に、従来の方法では、格子欠陥を含まず、かつ表面平滑
性のすぐれた単結晶膜を8+02のような絶碌1漢上に
形成することはきわめて困雉であった。However, the following drawbacks are observed even in the '4 film obtained by this method. That is, when the beam output was low, horizontal lattice defects were formed from Si on the semiconductor substrate toward 8102 at the edges of the beam scanning band. On the other hand, as the beam power is increased, S'
The phenomenon of roughening of the Si coating surface on 02 has been confirmed. As described above, with the conventional method, it is extremely difficult to form a single crystal film containing no lattice defects and having excellent surface smoothness on a crystalline film such as 8+02.
発明の目的
本発明はとのような事情に鑑みてなされたもので、結晶
性及び表面平滑性のすぐれた単結晶半導体層を絶縁膜上
に形成ぜ1〜める方法を提供するものである。Purpose of the Invention The present invention has been made in view of the above circumstances, and provides a method for forming a single crystal semiconductor layer with excellent crystallinity and surface smoothness on an insulating film. .
発明の実施例 以下実施例により、図面を参照しつつ説明する。Examples of the invention Examples will be described below with reference to the drawings.
第1図は本発明の第1の実施例を示す。FIG. 1 shows a first embodiment of the invention.
((’)nl)Si単結晶基板(1υを熱酸化し0.5
μmの5iO21摸旬2を形成後、開孔部をもうけた。((')nl)Si single crystal substrate (1υ thermally oxidized to 0.5
After forming 5iO21 sample 2 of μm, an opening was made.
1(F液を用いて、81表面自然酸化膜を除去し、純水
で10秒1呈・if、 Ik洗後、脱水して直ちにに空
装置に入力2.5 X 1.0 ”I”orrの真空中
で電子ビーム蒸着により非晶質Sr嘆(13)を0.5
、u m 唯積l〜だ(第1図(a))。次にこのウ
ェハを大気中に取り出しだ後、600’Oで2時間、N
2中で熱処理を行った。この熱処理により開孔部Si活
板上の非晶質81層は同相エピタキシャル成長を起こl
〜、単結晶SimQ4)になると共に、S ’ 02−
E杓11tmまで横方向へも単結晶化した(第1図(b
))。次に試料表面(Cレーザ光を照射し、SiO2上
の8!%を溶融−再結晶化せしめることにより横方向へ
エピタキシャル成長させた(第1図(C))。用いたレ
ーザ光は連続発振型アルゴンレーザでその出力は8N÷
1ちった。レーザ照射の際、基板は500 ’Oに加熱
された。レーザ光照射後、5102暎上のSi膜は単結
晶化(13)′シており、この単結晶t6t+31上に
NチャネルMO8)ランジスタ(15)を作り、キャリ
ア移動度を測定したところ、800ffl/seeの値
を示し、ベルク5i(001)面の場合よりわずかに下
回っただけであった(第1図(d))。1 (Remove the natural oxide film on the surface of 81 using F solution, wash with pure water for 10 seconds, wash with Ik, dehydrate and immediately input into the empty device 2.5 x 1.0 "I" Amorphous Sr(13) was deposited by electron beam evaporation in a vacuum of 0.5 orr.
, um only product l~ (Figure 1(a)). Next, this wafer was taken out into the atmosphere and then heated at 600'O for 2 hours with N
Heat treatment was performed in 2. This heat treatment causes in-phase epitaxial growth of the amorphous 81 layer on the open Si active plate.
~, single crystal SimQ4) and S' 02-
Single crystals were formed in the lateral direction up to 11 tm (Fig. 1 (b)
)). Next, the surface of the sample was irradiated with a C laser beam to melt and recrystallize 8!% of the SiO2, resulting in epitaxial growth in the lateral direction (Fig. 1 (C)).The laser beam used was a continuous wave type laser beam. The output of an argon laser is 8N÷
It was 1. During laser irradiation, the substrate was heated to 500'O. After laser beam irradiation, the Si film on the 5102 layer became a single crystal (13)'. An N-channel MO8) transistor (15) was made on this single crystal t6t+31, and the carrier mobility was measured to be 800 ffl/ The value of see was only slightly lower than that of the Belk 5i (001) plane (Fig. 1(d)).
第2図が本発明の第2の実施例を示す。FIG. 2 shows a second embodiment of the invention.
Si基板(21)の開孔部となるべき個所に耐I酸化性
マスクとして第一の5i02@’2″2を介してSiN
膜(23)を形成後、Si鳩板をKON溶液でエツチン
グする(第2図(a))。次に1000°ClO2ガス
雰囲気中にて酸化を行ない、8iNI[被着個所以外の
領穢に0.5ttmの第二のs io2膜(2力を形成
後、SiN l摸及び第一〕5i02 @を除去する(
第211(b) )。次ニCvD法を用いて多結晶Sr
嘆(模厚0.3μm)を堆積した後、S+イオン注入(
加電エネルギー180KeV。SiN was applied as an I oxidation-resistant mask through the first 5i02@'2″2 to the location where the opening of the Si substrate (21) was to be formed.
After forming the film (23), the Si pigeon plate is etched with a KON solution (FIG. 2(a)). Next, oxidation was carried out in a 1000° ClO2 gas atmosphere, and a second sio2 film of 0.5 ttm was applied to the area other than the deposited area. remove (
211(b)). Next, using the second CvD method, polycrystalline Sr
After depositing a thin layer (0.3 μm thick), S+ ion implantation (
Applied energy: 180KeV.
ドーズ址8xl 015(x ” )を施すことにより
前記多結晶Siを非晶質Si膜にする。この試料をN2
中、600°Cで2時間熱処理を行った。この熱処理に
よって開孔部Si鳩板上の非晶質層は同相エピタキシャ
ル成長を起こし単結晶層(251になると共に第1図に
示12だ実施と同様に横方向へも単結晶化l〜た(第2
図(C))。次に試料表面に第1図に示した実施例と同
様の条件でアルゴンレーザを照射した。The polycrystalline Si is made into an amorphous Si film by applying a dose of 8xl 015 (x ”). This sample is exposed to N2
Heat treatment was performed at 600°C for 2 hours. As a result of this heat treatment, the amorphous layer on the Si hole plate in the opening caused in-phase epitaxial growth to become a single crystal layer (251), and also became single crystal in the lateral direction (12) as shown in FIG. Second
Figure (C)). Next, the surface of the sample was irradiated with an argon laser under the same conditions as in the example shown in FIG.
照射後のSit漢表面表面射前のSi膜と同様に平滑な
表面であり、まだ、81漠全体にわたって単結晶化され
ていることが観察された。It was observed that the Si film surface after irradiation had a smooth surface similar to the Si film before irradiation, and that the entire 81 area was still single crystallized.
次(で、本発明の方法が、Si嘆拮晶性及びSi表面平
滑性を共に満足させつる理由を考察する。すなわちs
8 + 02の熱伝導度ばSiのそれと比べ約1/10
0であり、従って、ビームを照射した際の熱の逃げは5
102膜が拓っだ場合少なくなる。そのため同一エネル
ギーで照射した1局合、Sil板上の81膜の1福変は
5102114’上のSr嘆のそれよりも小さくなる。Next, we will discuss the reason why the method of the present invention satisfies both Si crystallinity and Si surface smoothness.
Thermal conductivity of 8 + 02 is about 1/10 compared to that of Si.
0, therefore, the heat escape when the beam is irradiated is 5
When the 102 membrane is expanded, the amount decreases. Therefore, in one case of irradiation with the same energy, 1 change in the 81 film on the Sil board is smaller than that of the Sr film on 5102114'.
従来法でけSil板上の81模も−また、5IO2嘆上
のS1模も溶融−再や吉晶化させているため、前者を溶
かそうとした場合、後者は必要以上に温度が上がり、そ
の表面が荒れたり、部分的に蒸発したりする。一方、後
者を溶かそうとした場合、前者の特にビームのぶち近傍
では十分に温度が高くならないだめ格子欠陥が導入され
、それが5i02暎上のS1嗅へも延在するものと考え
られる。In the conventional method, the 81 pattern on the Sil plate and the S1 pattern on the 5IO2 layer are melted and turned into autocrystals, so if you try to melt the former, the temperature of the latter will rise more than necessary, and the temperature will increase. The surface may become rough or partially evaporate. On the other hand, if an attempt is made to melt the latter, the temperature must become sufficiently high in the former, especially near the edge of the beam, or lattice defects will be introduced, which will extend to S1 on 5i02.
一方、本発明方法では、Si基板上の81膜は固相成長
により学績晶化させるだめ、ビームを照射する際に溶か
す必要はなく、5IO2上のSi膜のみを溶融−再結晶
化させることにより、結晶性及び表面平滑性を満足せし
めることが出来だと考えられる。On the other hand, in the method of the present invention, since the 81 film on the Si substrate is crystallized by solid phase growth, there is no need to melt it during beam irradiation, and only the Si film on the 5IO2 is melted and recrystallized. It is considered that this makes it possible to satisfy the crystallinity and surface smoothness.
発明の効果
このように、本発明1Cよって絶縁膜上に単結晶半導体
層を形成することができ、この単結晶半導体層にすぐれ
た一、=気的特性をもフトランジスタなどの素子を形成
することが可能となった。このため、半導体基板上のみ
でなく、立体的に集積回路を製造することができ、集積
度同上の効果が得られろ。Effects of the Invention As described above, according to the present invention 1C, a single crystal semiconductor layer can be formed on an insulating film, and an element such as a transistor can be formed on this single crystal semiconductor layer with excellent chemical characteristics. It became possible. Therefore, integrated circuits can be manufactured not only on a semiconductor substrate but also three-dimensionally, and the same effect as the degree of integration can be obtained.
発明の他の実施例
なお、上記実施例において基板及び半導体膜にはSiを
用イ九カ、Ge、GaA、s、GaP、 InPなどで
も本発明の効果を挙げろことが出来ることはもちろんで
ある。また半導体膜の形成法及び非晶質層の形成法それ
らの厚さなどによってその効果が減するものでけな(A
o
絶縁膜として熱り化S + 02膜を用いだが、本発明
は絶縁膜の材料及びその形成方法、その厚さなどによっ
てその効果が減するものでないこと(d明らかであるう
熱処理温度は400°C以上あればよい。また、低温熱
処理後さらに900 ’Oなどでの高@熱処理を行う方
法(Cよっても本発明の効果をあげることが出来た。Other Embodiments of the Invention Although Si was used for the substrate and the semiconductor film in the above embodiments, it goes without saying that the effects of the present invention can also be achieved with Ge, GaA, s, GaP, InP, etc. . Also, the effect may be reduced depending on the method of forming the semiconductor film, the method of forming the amorphous layer, their thickness, etc. (A
o Although a thermalized S+02 film is used as the insulating film, the effect of the present invention is not reduced by the material of the insulating film, its formation method, its thickness, etc. (d) It is obvious that the heat treatment temperature is 400°C. ℃ or more is sufficient.Also, the effect of the present invention could also be achieved by a method (C) in which a high temperature heat treatment at 900'O or the like is performed after a low temperature heat treatment.
エネルギービーム74 kr +/−ヂに限らp、Nd
−YA()レーザ、ルビーレーザなどレーザ光の他、電
子ビームを用いても本発明の効果を損うものではない。Energy beam 74 kr +/- only p, Nd
-YA() laser, ruby laser, or other laser light, and even if an electron beam is used, the effects of the present invention will not be impaired.
なお、熱処理及びビームアニール時の雰囲気はN2に限
らす02.Ar等の不活性ガス及びこれらガスの混合、
さらに真空中であっても同様の効果を挙げることが出来
た。Note that the atmosphere during heat treatment and beam annealing is limited to N2.02. Inert gas such as Ar and mixture of these gases,
Furthermore, similar effects could be achieved even in a vacuum.
第1図(・)乃至(d)及び1j第21望(a)乃至(
・)は各々本発明の詳細な説明する断面図である。
11.21 ・S+単単結晶板板12..22.24
・・SiO2膜、23・・・Si膜暎、13・・・非晶
質Si膜、14.25・・単結晶sI模。
第1図 第2図
)
7Figure 1 (・) to (d) and 1j Figure 21 (a) to (
.) are sectional views for explaining details of the present invention. 11.21 ・S+ single crystal plate 12. .. 22.24
...SiO2 film, 23...Si film, 13...amorphous Si film, 14.25...single crystal sI model. Figure 1 Figure 2) 7
Claims (1)
記絶縁膜が形成された基板上に非晶半導体層を形成する
工程と、熱処理により基板上の非晶質韻を固相エピタキ
シャル成長せしめる工程と、その後エネルギービームを
照射することによって前記基板上単結晶を種として、絶
縁上の半導体層を溶融−再結晶させることによね横方向
へエピタキシャル成長せしめる工程とを具備してなるこ
とを特徴とする半導体単結晶薄膜の製造方法。A step of selectively forming an insulating film on a semiconductor single-crystal wood board, a step of forming an amorphous semiconductor layer on the substrate on which the insulating film is formed, and a step of solid-phase epitaxial growth of the amorphous layer on the substrate by heat treatment. and a step of subsequently melting and recrystallizing the semiconductor layer on the insulating layer using the single crystal on the substrate as a seed by irradiating it with an energy beam, thereby causing epitaxial growth in the lateral direction. A method for manufacturing semiconductor single crystal thin films.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP56190617A JPS5893215A (en) | 1981-11-30 | 1981-11-30 | Manufacture of semiconductor singlecrystal thin film |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP56190617A JPS5893215A (en) | 1981-11-30 | 1981-11-30 | Manufacture of semiconductor singlecrystal thin film |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS5893215A true JPS5893215A (en) | 1983-06-02 |
Family
ID=16261046
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP56190617A Pending JPS5893215A (en) | 1981-11-30 | 1981-11-30 | Manufacture of semiconductor singlecrystal thin film |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5893215A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6189622A (en) * | 1984-10-09 | 1986-05-07 | Fujitsu Ltd | Formation of silicon single crystal film |
| JP2020520129A (en) * | 2017-05-10 | 2020-07-02 | マクマホン, シェーン トマスMCMAHON, Shane Thomas | Thin film crystallization process |
-
1981
- 1981-11-30 JP JP56190617A patent/JPS5893215A/en active Pending
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6189622A (en) * | 1984-10-09 | 1986-05-07 | Fujitsu Ltd | Formation of silicon single crystal film |
| JP2020520129A (en) * | 2017-05-10 | 2020-07-02 | マクマホン, シェーン トマスMCMAHON, Shane Thomas | Thin film crystallization process |
| US11810785B2 (en) | 2017-05-10 | 2023-11-07 | Lux Semiconductors | Thin film crystallization process |
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