JPS5898954A - Output buffer device - Google Patents

Abstract

PURPOSE:To prevent the decrease in the breakdown voltage due to the high pressure resistance of source and drain junction layer and a channel stopper junction by increasing the gate length of an MOSFET and adding a pinch-off resistance to both the source and the drain adjacent to a source. CONSTITUTION:In an MOSFET, a pinch-off resistance layer 24 is formed on both a source diffused part 22 and a drain diffused part 23, thereby enhancing the pressure resistance of both the region 22 and the bonding layer of the region 23. The decrease in the breakdown voltage due to the junction of the source, drain diffused layer and the channel stopper by isolating the layers 22, 23 from the channel stopper 27.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an output buffer device using a high voltage MO8 field effect transistor (hereinafter abbreviated as MO5FET).

In recent years, there has been an active movement toward on-chip high-voltage output buffers that directly drive fluorescent display tubes or similar display tubes on integrated circuits.

A conventionally used high voltage output driver is schematically shown in FIG. In each of the circuits shown in FIGS. 1(a) to (C), the circuits before the final inverter 1 are complementary MO8) transistors (hereinafter abbreviated as CMO8FICT), P-channel MO
S F E T father c N f Tufnel type MO8FICT
It is assumed that it is formed by The output side of the inno(-1) is connected to the gate of the buffer transistor 2,
In addition, one end of this buffer 1 transistor 2 is connected to the power supply terminal 3.
From this, circuit voltage Vcc is applied. However,
This buffer transistor 2 has a so-called high breakdown voltage transistor structure because, for example, when driving a fluorescent display tube, a large output signal amplitude of about 30 to 40 V is required. In addition, in this type of drive circuit, normally when input is input from the input terminal 4 of the inverter 1 and output is obtained from the drain side of the buffer transistor 2 as shown in FIG. There are many output methods that use so-called open drain formation as a terminal.

In FIG. 1 Φ), a pull-down resistor 6 is added to the buffer transistor 2, and this can be made using the resistor of the diffusion layer. A voltage Vp other than the power supply voltage Vcc is applied to the terminal 7. Generally, this pull-down resistor is required to have a fairly large resistance, for example, several tens to several tens of kilohms, in order to adapt to the operating conditions of an externally connected driven device, such as a fluorescent display tube. Now, if we try to form a resistance of this size with a diffusion layer, we need a shape with a very large value of L/W, where the length of the diffusion layer is divided by the width of the diffusion layer. For example, if the sheet resistance of the diffusion layer is 10oΩ/hole, (-+7)L/W will be 102 to 1o54, and if W is 10μ, L will be 10 to 10μ. It becomes the area.

Figure 1 ((=) shows MO8 instead of pull-down resistor.
It adopts FIEτ8. For example, in Figure 1 (C
) is used as an output buffer, the signal processing circuit before the inverter circuit 1 is configured in the usual 0MO8 or single channel circuit format, and high speed is required. Do not operate with the power supply voltage Vcc set to 6V, for example, and do not use it at a very high voltage. On the other hand, the output circuit section including the buffer transistor 2 is driven by the power supply voltage Vp, for example,
A high voltage resistance of 4°V is required.

In this way, in order to combine and use a low-voltage, high-speed circuit and a high-voltage output circuit, for example, the former can be used with 0M08
It is preferable to use FRT and form the latter a P-channel type high-voltage backup circuit.

The above-mentioned high-voltage buffer circuit formation often uses an offset gate structure or a stacked gate structure, and is usually a so-called closed gate structure in which the output terminal on the high-voltage side does not touch the channel stopper. A high withstand voltage is achieved by using a type of transistor. Figure 2 shows its planar structure. 11 is a gate electrode, and this drain part 12 is closed so that it does not contact the channel stopper under the thick film. It has a gate structure.

That is, the drain electrode is led out through the contact hole 13 with the aluminum electrode 14 . 16 is a source, 16 is a thick film insulation part, and in such a structure, the source part is 1
It is important to contact the channel stopper under the thick film of No. 6.

In this case, the drain has a high breakdown voltage structure, but the face side is determined by the breakdown voltage at the channel stopper and source junction.

Here, MO8F of the pull-down resistance element in FIG. 1(c)
The problem is how to make ICTa high withstand voltage.

In FIG. 1C, when the buffer transistor 2 is off, the threshold voltage of the drain side terminal 6 rises to Vp-7, assuming that the threshold voltage is 7. For this reason, the resistance element MO19FICT8 must have a high breakdown voltage on both the source and drain sides. Furthermore, to implement this pull-down resistor value in yO8FXT, it is usually necessary to design a transistor where W/L<<1, ie, L is larger than W. This is difficult to create with a rose gate structure as shown in FIG. That is, in a normal closed transistor structure, w>>h, so in order to achieve W/L<<1, an FIT structure with a large extreme KL as shown in FIG. 3 is required. In this figure, 17 is a polysilicon closed electrode, 18 is a drain diffusion region, 19 is a source diffusion region, 20 is a thick film insulating region where a channel stopper is formed, 19 is a source region, and 20 is a channel. By providing a non-operating portion with a predetermined spacing between the stopper portion and the stopper portion, a breakdown voltage drop due to the source and channel stopper junctions can be prevented. However, it is actually extremely difficult and undesirable to accurately design the mutual conductance of such a transistor.

In view of such considerations, the present invention provides a high voltage resistor (load) transistor for use in an output buffer. The structure of one embodiment is shown in FIG. Figure 4 (a
) is a plan view of the main part, and ) is a sectional view taken along ■-■. 21 is a polysilicon gate electrode, 22 is a source diffusion region, 23 is a drain diffusion region, and 24 is a pinch-off resistance layer.By forming this resistance layer 24 on both the source and drain, high breakdown voltage of the source and drain junction layers can be achieved. We are working to realize this goal. Looking directly under the polysilicon gate electrode 21, the inner portion 25a is a channel region, and the outer portion 25a is a channel stopper.
As can be seen from FIG. Φ), this corresponds to the LOGO8 oxide film 26 and the channel stopper 27 formed directly below it. Further, by separating the source and drain diffusion layers 22 and 23 from the channel stopper 27, a decrease in breakdown voltage due to the junction between the source and drain diffusion layers and the channel stopper is improved. Note that 28 and 29 are aluminum electrodes for source and drain, and 30 is a gate insulating film.

In this way, by providing a resistance layer adjacent to both the source and drain and separating both the source and drain from the channel stopper to increase the withstand voltage, the high withstand voltage transistor of the buffer circuit shown in Figure 1(c) can be realized. realizable.

[Brief explanation of drawings]

Figures 1 (a) to (C) are conventional circuit diagrams of high voltage output drivers, Figures 2 and 3 are closed structure MO8FEE
4(a) and 4(b) are plan views of a high voltage MO8FKT according to an embodiment of the present invention.
FIG. 22... Source region, 26... Gate electrode, 23... Drain region, 24...
- Pinch-off resistance layer, 27...Channel stopper region. 111 Procedural amendment of Figure 2, Figure 3, Figure 4, f, 1981, 1982, Surrender, Director General of the Patent Office, 1988, Patent Application No. 198118, Name of Invention, Output Buffer Device 3, Amendment Person who does 4 agents 〒571

Claims (1)

[Claims] An output buffer device characterized in that it uses an MO8 field effect transistor whose gate length is longer than the gate width and which has pinch-off resistors attached to both the source and drain adjacent to the gate.