JPS59119742A - 半導体装置の製造方法 - Google Patents

半導体装置の製造方法

Info

Publication number
JPS59119742A
JPS59119742A JP57226514A JP22651482A JPS59119742A JP S59119742 A JPS59119742 A JP S59119742A JP 57226514 A JP57226514 A JP 57226514A JP 22651482 A JP22651482 A JP 22651482A JP S59119742 A JPS59119742 A JP S59119742A
Authority
JP
Japan
Prior art keywords
layer
melting point
high melting
polycrystalline silicon
thickness
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP57226514A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0418700B2 (2
Inventor
Ryoichi Mukai
良一 向井
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP57226514A priority Critical patent/JPS59119742A/ja
Publication of JPS59119742A publication Critical patent/JPS59119742A/ja
Publication of JPH0418700B2 publication Critical patent/JPH0418700B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/40—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
    • H10W20/49—Adaptable interconnections, e.g. fuses or antifuses
    • H10W20/491—Antifuses, i.e. interconnections changeable from non-conductive to conductive
    • H10W20/492—Antifuses, i.e. interconnections changeable from non-conductive to conductive changeable by the use of an external beam, e.g. laser beam or ion beam

Landscapes

  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
  • Semiconductor Memories (AREA)
JP57226514A 1982-12-25 1982-12-25 半導体装置の製造方法 Granted JPS59119742A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP57226514A JPS59119742A (ja) 1982-12-25 1982-12-25 半導体装置の製造方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57226514A JPS59119742A (ja) 1982-12-25 1982-12-25 半導体装置の製造方法

Publications (2)

Publication Number Publication Date
JPS59119742A true JPS59119742A (ja) 1984-07-11
JPH0418700B2 JPH0418700B2 (2) 1992-03-27

Family

ID=16846315

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57226514A Granted JPS59119742A (ja) 1982-12-25 1982-12-25 半導体装置の製造方法

Country Status (1)

Country Link
JP (1) JPS59119742A (2)

Also Published As

Publication number Publication date
JPH0418700B2 (2) 1992-03-27

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