JPS59149061A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To increase dielectric resistance between a first layer electrode and a second layer electrode by oxidizing the upper surface side of an oxygen doped polycrystalline silicon layer formed on an underlay electrode layer to form an inter-layer insulating layer while using a composite layer of a section, which is not oxidized and remains, and the underlay electrode layer as the first layer electrode. CONSTITUTION:A phosphorus doped polycrystalline silicon layer (an underlay electrode layer) 3a as one part of a first layer gate electrode 3 is grown through a decompression vapor phase growth method, and phosphorus is diffused to lower its resistivity. An oxygen doped polycrystalline silicon layer is formed through the decompression vapor phase growth method, and the upper surface side of the oxygen doped polycrystalline silicon layer is thermally oxidized to form a second gate oxide film (an inter-layer insulating film) 4a. Polycrystalline silicon is hardly recrystallized by heat because there are a large number of traps in the oxygen doped polycrystalline silicon layer 3b, which is not oxidized and remains, and phosphorus does not intrude by the traips. Dielectric resistance between the first layer gate electrode 3 and a second layer gate electrode 5 is increased because irregularities are not formed in the surface of the first layer gate electrode 3 and field concentration is reduced by said effect.

Description

DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to an improvement in a method for manufacturing a semiconductor device in which polycrystalline silicon is oxidized to form an interlayer insulating layer between two electrode layers.

[Prior art]

Hereinafter, a method for manufacturing a semiconductor device with a two-layer gate electrode structure will be described as an example.

FIG. 1 is a cross-sectional view of the main parts of a double-layer gate electrode structure semiconductor device manufactured by a conventional method. In Figure 1, (
+) is a semiconductor substrate, (2) is a field oxide film formed on the surface of the semiconductor substrate (1) to provide insulation between adjacent elements, and (3) is a field oxide film (2).
) is connected to the first gate oxide film (field oxide film (2) in the direction perpendicular to the plane of the paper from above, but is not shown).

) A first layer gate electrode consisting of a remaining portion that was not oxidized when a second gate oxide film (described later) was thermally oxidized to form a first polycrystalline silicon layer in a predetermined pattern over the top of the first polycrystalline silicon layer ( 4) is a second gate oxide film formed by oxidizing the first polycrystalline silicon layer;
) is a second layer gate electrode made of a second polycrystalline silicon layer formed on the second gate oxide film (4).

In manufacturing the above-mentioned two-layer gate electrode structure semiconductor device, a first polycrystalline silicon layer is formed over the field oxide film (2) and the first gate oxide film by vapor phase growth. Next, phosphorus is diffused into the first polycrystalline silicon layer to lower the resistivity.

Next, a second gate oxide film (4) is formed by thermally oxidizing the surface side of the first polycrystalline silicon layer. At this time,
The remaining portion of the first polycrystalline silicon layer becomes the first layer gate electrode (3). Further, on this second gate oxide film (4), a second layer gate electrode (
By forming 6), the construction cost part of the manufacturing process is completed.

The second gate oxide film (4) is the surface shape of the first layer gate electrode (3) which is the remaining portion of the first polycrystalline silicon 1- under the first oxide film (4) in which phosphorus is diffused. are in very different states, and the breakdown voltages of the first layer gate electrode (3) and the second layer gate electrode (5) are also affected.

That is, the conventional second gate oxide film (4) is the second gate oxide film (4).

The first polycrystalline silicon layer undergoes phosphorus diffusion, so if it is thermally oxidized, the first layer gate electrode (3) under the second gate oxide film (4) ), recrystallization of polycrystalline silicon occurs due to the effects of phosphorus and heat, unevenness occurs on the surface, electric field concentration occurs, and the first layer gate electrode (3) and the 21st layer gate electrode (3) ? lt
The withstand voltage between &(5) decreases.

[Summary of the invention]

The present invention has been made for the purpose of eliminating the above-mentioned drawbacks of the conventional devices, and is intended to provide a method for manufacturing a semiconductor device having a two-layer electrode structure, by forming a layer on an underlying electrode layer formed on a semiconductor substrate with or without an insulating film. The upper surface side of the oxygen-doped polycrystalline silicon layer formed in is oxidized to form an interlayer insulating layer, and the composite j- of the unoxidized portion of the oxygen-doped polycrystalline silicon layer and the underlying electrode layer is formed as the first layer. The present invention provides a method for manufacturing a semiconductor device in which unevenness on the top surface of the first layer electrode is eliminated by forming the electrode, and the breakdown voltage between the first layer electrode and the second layer electrode is improved.

[Embodiments of the invention]

The present invention will be described below based on an example in which the present invention is applied to the manufacture of a semiconductor device with a double-layered gate electrode structure.

FIG. 2 is a cross-sectional view of the construction portion of the double-layer gate electrode structure semiconductor device manufactured by the method of the example. In Figure 2,
The same reference numerals as in FIG. 1 represent the same components as shown in FIG. (3a) is a phosphorus-doped polycrystalline silicon layer formed from the field oxide film (2) to the first gate oxide film (not shown) and constitutes a part of the first layer gate electrode; (3b) is the phosphorus-doped polycrystalline silicon layer. Silicon layer (
3a) This is the remaining portion of the oxygen-doped polycrystalline silicon layer that was not oxidized when a second gate oxide film, which will be described later, was formed by thermal oxidation. The phosphorus-doped polycrystalline silicon layer (3a) and the remaining portion (3b) of the oxygen-doped polycrystalline silicon layer constitute a first layer gate electrode (3).

(4a) is a second gate oxide film formed by oxidizing the upper surface side of the oxygen-topped polycrystalline silicon layer.

Next, the method of the example will be explained.

1st Ii! The phosphorus-doped polycrystalline silicon that will become part of the gate electrode is produced by vapor phase growth using a reduced pressure method, and the specific resistance is lowered by diffusing phosphorus. Next, the oxygen-doped polycrystalline silicon layer is heated to a temperature of 630''C.

Silane gas (Sta4), nitrous oxide gas (N2o)
A film having a thickness of 1000 A is produced by a reduced pressure vapor phase growth method under the conditions of helium gas (Hθ). The oxygen concentration at this time was 30 atomic percent.

There are many traps in the oxygen-doped polycrystalline silicon that remains unoxidized under the oxide film mark, which prevents phosphorus from entering. , almost no recrystallization of polycrystalline silicon occurs due to heat. This effect eliminates unevenness on the surface of the first layer gate electrode (3) and reduces electric field concentration, which increases the withstand voltage between the first gate electrode (3) and the second N gate electrode (5). It went up.

In the above description, the case where phosphorus is diffused into a polycrystalline silicon layer to which phosphorus is not added to form a phosphorus-doped polycrystalline silicon layer is explained, but phosphorus may be ion-implanted instead of diffusion. A polycrystalline silicon layer may be formed in a phosphorus atmosphere to form a phosphorus-doped polycrystalline silicon layer.

Furthermore, in the above embodiments, a case has been described in which the present invention is applied to manufacturing a semiconductor device with a two-layer gate structure. It can be widely applied to the production of.

Furthermore, in the above embodiment, the first node described the case where a phosphorus-doped polycrystalline silicon layer is interposed under the oxygen-doped polycrystalline silicon layer. For example, the present invention can also be applied to a structure in which a molybdenum silicide layer is present.

〔Effect of the invention〕

In the method for manufacturing a semiconductor device according to the present invention, since no unevenness occurs on the upper surface of the oxygen-doped polycrystalline silicon layer constituting the upper surface side of the first layer electrode, 0 which improves the withstand voltage between electrodes

[Brief explanation of drawings]

FIG. 1 is a cross-sectional view of the main parts of a semiconductor device with a two-layer gate electrode structure manufactured by a conventional method, and FIG. FIG. In the figure, (1) is the semiconductor substrate, (2) is the field oxide film (insulating film), +31 is the first gradual gate) single pole (first layer electrode), and (Sa) is the phosphorus-doped polycrystalline silicon layer (underlayer). (electrode layer), (31)) is the unoxidized remaining part of the oxygen-doped polycrystalline silicon layer, f41 e (4a) is the second gate oxide film (j@ insulation 1m), (it is the second X gate)' It is an IJt pole (second layer 1L pole). Note that the same reference numerals in the figures indicate the same or equivalent parts. Agent Shin Kuzuno - (1 other person Figure 1, Figure 2, Figure 1, Case description Japanese Patent Application No. 58-25025 21 Title of the invention Method of manufacturing semiconductor devices 3, Person making an amendment Relationship to the case Patent applicant Address: 2-2-3 Marunouchi, Chiyoda-ku, Tokyo Name (601) Nisubishi Electric Co., Ltd. Representative Katayuni The text is corrected as follows. (2)

Claims (4)

[Claims] (1) A step of forming an underlying electrode layer on a semiconductor substrate with or without an insulating film, a step of forming an oxygen-doped polycrystalline silicon layer on the underlying electrode layer, and an upper surface of the oxygen-doped polycrystalline silicon layer. a step of oxidizing the side to form an interlayer insulating layer and forming a first layer electrode by the unoxidized portion of the oxygen-doped polycrystalline silicon layer and the underlying electrode layer; A method of manufacturing a semiconductor device, comprising the step of forming a second layer electrode. (2) Claim 1, characterized in that the oxygen concentration of the oxygen-doped polycrystalline silicon layer is 1 atomic percent or more.
A method for manufacturing a semiconductor device according to section 1. (3) The method of manufacturing a semiconductor device according to claim 1 or 2, wherein the underlying electrode layer is a polycrystalline silicon layer enriched with phosphorus by diffusion or ion implantation. (4) The semiconductor device according to claim 1 or 2, wherein the underlying electrode I- is a polycrystalline silicon layer to which phosphorus is attached, which is formed in an atmosphere containing phosphorus. Production method. ([1) The method for manufacturing a semiconductor device according to claim 1 or 2, wherein the underlying electrode layer is made of molybdenum silicide.