JPS5976200A - Exciter for synchronous machine - Google Patents

Abstract

PURPOSE:To obtain an exciter for a synchronous machine which does not largely vary at the terminal voltage of the machine by a system stabilizer even when a stabilization signal signification varies slowly due to the fluctuation of the power. CONSTITUTION:A stabilization signal P is fed to a phase compensator 30 through a signal resetter 21 of a system stabilizer 20, a phase compensator 22 and a gain controller 23. The compensator 30 has a transfer function of both the gain controller 14 of an automatic voltage regulator 10 and a stepout preventing circuit 15. The output of the compensator 30 is applied to an adder 31 through a limiter 24. The adder 31 ads the output of the circuit 15 and the output of the stabilizer 20. In this manner, even when the stabilization signal significantly varies slowly due to the fluctuation of power, the terminal voltage of a synchronous machine is not largely varied.

Description

[Detailed Description of the Invention] [Technical Field of the Invention] The present invention relates to a device for controlling the excitation voltage of a synchronous machine, and in particular, a device for controlling the excitation voltage of a synchronous machine, and in particular, an automatic voltage regulator for controlling the terminal voltage of a synchronous machine by transmitting a signal from a system stabilizing device. [Technical Background of the Invention] FIG. 1 is a block diagram of a conventional excitation device for a synchronous machine. This excitation device is an automatic voltage regulator (hereinafter referred to as AVR) that adjusts the voltage of the field winding 1a of the synchronous machine J.
10 and synchronous machine 10 AVR using stabilizing signals such as rotor speed ω, terminal voltage frequency f, and active power P as auxiliary signals.
10 and a system stabilizing device (hereinafter referred to as PSS) 20. The AVR 10 uses a detection circuit 11 to detect the terminal voltage of the synchronous machine 1 input through the voltage transformer Tk valve, and outputs the detected @ signal to the deviation device 12. Then, the deviation device 12 adds the reference voltage from the reference voltage circuit 13 and the output from the PSS 20, which will be described later, and further adds the reference voltage from the reference voltage circuit 13 to the output from the PSS 20, which will be described later.
The detection signal is subtracted from 1 and output. The output signal of the deviation device 12 is subjected to jig-in adjustment by a dyne adjustment circuit 14 having a predetermined large amplification factor in order to improve control deviation and control responsiveness, and then supplied to a disturbance prevention circuit 15.

In order to improve the instability of the synchronous machine 1, the disturbance prevention circuit 15 lowers the gain of the high frequency band (0.05H1 or more) of the input signal to lower the transient response and output the signal. This signal is then amplified and rectified by the thyristor gate control circuit 16 and the thyristor rectifier circuit 17 and sent to the field winding 1dJla of the synchronous machine 1. Thus, the field voltage of the synchronous machine 1 is controlled by AVRJO. Here, the transfer function in the dyne adjustment circuit 14 and the disturbance prevention circuit 15 is Ka(1+T1·S)/(1+72·S). Ka is the gain adjustment circuit 140 dyne, T1. T2 is a lead time constant, a delay time constant, and S in the disturbance prevention circuit 15.
is a lazolas operator.

On the other hand, PSS 2 o cannot obtain much braking force against electrical and mechanical power fluctuations in the power system including the synchronous machine 1 by controlling only the AVR 10, resulting in poor stability. This is provided to increase stability and improve stability.

FIG. 2 is a basic block configuration diagram of this PSS 20. As shown in this figure, if the active power Pt of the synchronous machine 1 is equal to the stabilization signal, the stabilization signal is input to the signal reset circuit 21 of the PSS 20. Therefore, the signal set circuit 2 is connected to the power system and the synchronous machine 1 by an incomplete differentiation circuit.
All the frequency components of the power oscillation between the two are transmitted, and the frequency components that change slowly below that frequency component are approximately converted into a signal of the change from the steady value, and at the same time, the frequency components that change relatively slowly are transferred. On the other hand, the output signal of PS820 is outputted so as not to be biased in any one direction. The output of the signal reset circuit 2 is passed through the phase compensation circuit 22 and the gain adjustment circuit 23, and the output from the AVR 20 becomes a signal for appropriate braking in response to power fluctuations.

The signal from the dyne adjustment circuit 23 is limited by the limit circuit 24 to within a preset limit value Ll, and is made into a signal that completely suppresses excessive changes in the terminal voltage of the synchronous machine 1. Output to.

[Problems with background technology]

In the above-mentioned conventional excitation device for a synchronous machine, consider a case where, for example, after the synchronous machine 1 is connected to the power system, the output sub-side 1-g is turned on in order to take on a predetermined load within a short period of time. In such a case, the stabilization signal P will change much more slowly than the frequency of normal power fluctuations. Figure 3(a)
(b) and (c) are diagrams showing changes in each output in the excitation device of the synchronous machine in such a case. In the case where the active power P of the synchronous machine 1 gradually increases continuously as shown in FIG. The voltage exceeds the limit value -Ll, resulting in an output voltage e1 limited by -ah as shown in FIG. 3(b).

Therefore, the terminal voltage e2 of the synchronous machine 1 is lowered by the limit value ±L1 of the limit circuit 24 from the reference voltage set by the reference voltage setting circuit I3 in AVRJ O, as shown in FIG. 3(C). As a result, the phase-advanced current of the armature in the synchronous machine 1 may increase and exceed the rated current, or in the worst case, the synchronizing power may be lost and synchronization may occur. Conventionally, in order to prevent such a problem, measures have been taken to reduce the limit value ±Ll of the limit circuit 24 or to make the time constant of the signal reset circuit 21 extremely small. However, limit value expert LJ
If a T-bag is used, when a failure or the like occurs in the power system and a large power fluctuation occurs, the output of the PSS 20 will be limited to a limit value ±L1, and the effect of providing the PSS 20 will be diminished. - If the time constant of the signal reset circuit 2 is made small, there is a problem that the synchronous machine 1 cannot be stably controlled over a wide range of frequency components in the oscillation. In order to solve the above problems, the present invention aims to prevent the terminal voltage of a synchronous machine from changing significantly due to PSS even when the stabilization signal changes significantly slowly due to power fluctuations, and furthermore, during normal operation, conventional PSS is not used. The purpose of the present invention is to provide an excitation device for a synchronous machine that can fully demonstrate its functions.

[Summary of the invention]

The present invention has been developed to achieve the above object, and provides an automatic voltage regulator having a gain adjustment circuit and a disturbance prevention circuit for appropriately controlling the terminal voltage of a synchronous machine connected in parallel to an electric power system. At the subsequent stage of the disturbance prevention circuit, a circuit having a predetermined transfer function 2 of a signal consisting of at least one of the rotational speed of the synchronous machine, the frequency of the terminal voltage of the synchronous machine, and the active power of the synchronous machine, a limit circuit, and the automatic voltage adjustment. The most notable feature is that the phase compensation means, which includes the transfer function of the dyne adjustment circuit and the disturbance prevention circuit in the device, is added through a newly installed system stabilization device.

[Embodiments of the invention]

Hereinafter, an embodiment of the present invention will be described in Figs. 4 and 5 (,).
This will be explained with reference to FIGS. 6(b) and 6(a), (b), (c) and w. Note that the same parts as in FIGS. 1 and 2 are given the same reference numerals and detailed explanations will be omitted. FIG. 4 is a block diagram showing an excitation device for a synchronous machine according to the present invention. The excitation device of the synchronous machine shown in Fig. 4 is as shown in Fig. 2.
A second phase compensation circuit 30f is newly installed between the gain adjustment circuit 23 and the limit circuit 24 in the PSS 20, and has the functions of the AVRZO gain adjustment circuit 14 and disturbance prevention circuit 15 shown in FIG. Rani PSS
The output of the AVR 10 shown in FIG. 1 is the disturbance prevention circuit 1.
5 and the thyristor gate flill l+1 circuit 16.

Here, the second phase compensation circuit 30 has Ka(1+TJ
It has a transfer function 2 of ・S)/(1+T, ?・S), and sends the output signal from the gain adjustment circuit 23 to the limit circuit 24. Here, Ka is the gain of the gain adjustment circuit 14,
Further, TI and T2 are a lead time constant and a lag time constant of the disturbance prevention circuit 15. Therefore, the advance time constant T1 is smaller than the delay time constant aT2, and TJ is about 0.5 seconds to 1.5 seconds. Tsu'! "The second phase compensation circuit 30 has a frequency of 0.32 Hz (1/Tl f 2 y
It has the characteristic that the transient gain of high frequency components in power fluctuations equal to or greater than the value divided by r (in this case, the leading time constant TJ is 0.5 seconds) is Ka (TJ/T, ?), that is, it has a low transient dyne. . Also limit circuit 2 of PSS 20
The limit value 4 is obtained by multiplying the conventionally set limit value ±L by the transient gain of the second phase compensation circuit 30. In other words, this limit value is ±L I X Ka
X (T 1 / T 2 ).

Next, the operation of the apparatus configured as described above will be explained. Here, the stabilization signal is applied to the synchronous machine 1 as in the conventional exciter.
It is assumed that the effective power P'lj is used. First, the operation with respect to power fluctuations (IHzHz) during normal operation is as follows. When a part of the power transmission line near synchronous machine 1 is opened to cause power fluctuations, a stabilization signal including the power fluctuations is generated. P is input to the signal reset circuit 21 of the PSS 20.

This stabilization signal P is supplied to the signal reset circuit 21, phase compensation circuit 22 and gain adjustment circuit 2 as in the conventional case.
3, it becomes a signal e3 as shown in FIG. 5(,) and is sent to the second phase compensation circuit 30. Since the frequency of power fluctuation is around IHz, the second phase compensation circuit 30 multiplies the output 03 from the sydyne adjustment circuit 23 by Ka×(T1/T2) according to the above-mentioned transfer function, and slightly adjusts the phase. The delayed signal e4 is output as shown in FIG. 5(b). Therefore, the output of the M2 phase compensation circuit 30 is ±L at maximum.
It will be JXKaX (T7/T2).

PSS20 is the limit value ±L i X Ka X
(T1/T2) and sends the output e4fAVR1,0 to the adder 31 shown in FIG. 5(b).

- The detection circuit 11 of the AVR 10 detects the terminal voltage of the synchronous machine 1. Then, this detected voltage and the reference voltage 'Kt1
3 and the reference voltage is sent from the deviation device 12 to the gain adjustment circuit 14. Therefore, the gain adjustment circuit 14 and the disturbance prevention circuit 15 control the deviation signal from the deviation device 12 to zero, as in the conventional case, and control the deviation signal from the deviation device 12 to 0.05 Hz.
Adder 3 reduces the gain in the frequency band above
Output to 1. As a result, adder 3 has PSS 20
and the output from the disturbance prevention circuit 15 are added together. Based on this addition signal, the thyristor gate control circuit 16 and the thyristor rectifier circuit 17 operate, and the synchronous machine 1
Apply the field voltage to the field winding 1&.

Next, a description will be given of the operation when the synchronous machine 1 is connected in parallel to the power system, then a predetermined load is applied for a short time, and the stabilization signal P changes significantly and slowly. Figure 6 (,)
(b) (C) shows signal waveforms at various parts when the stabilization signal P changes significantly and slowly. Now, if the active power P of the synchronous machine 1 changes significantly and gradually as shown in FIG. 6(-), then the stabilizing signal P
or manually input the signal reset circuit 21 of the pss20.

As a result, the signal reset circuit 21 and the phase compensation circuit 2
2 and the gain adjustment circuit 23 function to suppress power fluctuations in the same manner as described above, and send a stabilizing signal P to the second phase compensation circuit 30. The second phase compensation circuit 30 is 0.32
Limit circuit 2 with phase compensation for frequencies higher than Hz
However, since the stabilizing signal P is continuously changing to 10,000 as shown in FIG.
Please reach T2). Therefore, the output e1 from the PSS 20 changes in voltage as shown in FIG. 6(b) and is sent to the adder 31. On the other hand, the deviation output between the detection signal of the terminal voltage detected by the detection circuit 11 of AVIL JO and the reference voltage from the reference voltage circuit 13 is used as the gain adjustment port! i! ! 114 and the disturbance prevention circuit 15 transmit the signal using the transfer function of Ka(1+TJ・S)/(1+T2・S) in the same manner as described above, lower the dyne of frequencies of 0.05 Hz or more, and send it to the adder 3. send. For this reason, the adder 31
The output that is sent to the field winding 1a of the synchronous machine 1 by valving the cycle dirt control circuit 16 and the cycle shift rectifier circuit 17 is the change in the terminal voltage e2 of the synchronous machine 1, as shown in Figure 6 (C).
As shown in , -LfX(TJ/T, ?) is obtained. Here, since the delay time constant T2 is about 3 to 8 times the advance time constant T, the change in the terminal voltage e2 of the synchronous machine 1 is -L
It becomes 1/3 to 1/8 times of 1.

In this way, in this device, a second transfer function is newly added between the gain adjustment circuit 23 and the limit circuit 24 in the conventional PSS 20, which has a transfer function equivalent to the sum of the gain adjustment circuit 14 and the disturbance prevention circuit 15 in the AVR 10. A phase compensation circuit 30f is installed, and PSS 20 (
Since it is added after the disturbance prevention circuit 15 in the D output 'kAVR10, the power fluctuation (IH
2), the low transient gain Ka×(T1/T2) of the second phase compensation circuit 30 is
The output of 0 is the limit value of the limit circuit 24 ±L1×KI
This becomes a signal that does not exceed L×(T1/'f'2). Therefore, the PSS 200 function can be fully utilized to suppress power fluctuations and improve the stability of the power system. Also, if the stabilization signal P changes significantly and slowly,
Decreased amount K of the transient gain of the second phase compensation circuit 30
The limit value ± of the limit circuit 24 is set smaller than the conventional limit value ±L by aX (TJ/T2).
Since the output of PSS 20 is limited by L I , the terminal voltage of the synchronous machine 1 does not change significantly due to slow changes in the stabilizing signal P.

Note that the present invention is not limited to the above embodiment. For example, the transfer function of the second phase compensation circuit 30, which has the functions of the key adjustment circuit 14 and the disturbance prevention circuit 15 of AvRlo, is the transfer function of the phase compensation circuit 2 of the PSS 20.
2 and the gain adjustment circuit 23. Such a deviation has the advantage that it is not necessary to provide the second phase compensation circuit 30f.

In addition, the output e1 of the PSS 20 can be input to the subsequent stage of the disturbance prevention circuit 15 in the AVR 10.
The positions of the gain adjustment circuit 14 and the disturbance prevention circuit 15 may be reversed. Furthermore, even if the function of the disturbance prevention circuit 15 is a feedback method, the output e of the PSS 20
4 may be input behind the feedback point. This does not reduce the effectiveness of the present invention.

〔Effect of the invention〕

According to the present invention, the output of a PSS equipped with a phase compensation means having a transfer function that is a combination of a gain adjustment circuit and a disturbance prevention circuit in an AVR is transferred to a stage subsequent to a disturbance prevention circuit having a transfer function that reduces the transient dynes in an AVR. As a result, even if the stabilization signal changes significantly and slowly due to power fluctuations, the terminal voltage of the synchronous machine does not change significantly due to PSS, and moreover, during normal operation, We can provide excitation equipment for synchronous machines that can fully demonstrate the functions of

[Brief explanation of drawings]

Fig. 1 is a diagram of output waveforms of various parts in the excitation device of a conventional excitation device for a synchronous machine, Fig. 4 is a configuration diagram of an embodiment of an excitation device for a synchronous machine according to the present invention, and Fig. 5 (
) (b) and FIGS. 6 (,) (b) and (c) are output waveform diagrams of each part in this device. DESCRIPTION OF SYMBOLS 1... Synchronous machine, 10... AVR, 11... Detection circuit, 12... Deviation device, 13... Reference electric ratio circuit, 14
. . . Key adjustment circuit, 15 . . . Random adjustment prevention circuit, 1
6... Sirinutagut control circuit, 17... Zu-Iristor rectifier circuit, 20... PSS,...? J... Sequential 1) set circuit, 22... Phase compensation circuit, 23
...Gain adjustment circuit, 24...Limit circuit, 30
...Second phase compensation circuit, 3rd...Adder.

Claims (1)

[Claims] An automatic voltage regulator has a dyne adjustment circuit and a disturbance prevention circuit for appropriately controlling the terminal voltage of a synchronous machine connected in parallel to the power system, and the automatic voltage regulator has a synchronous machine rotation speed and a synchronous machine terminal. In the excitation device, the system stabilizing device is configured to apply a signal consisting of at least one of the frequency of the voltage and the active power of the synchronous machine through a circuit having a predetermined transfer function and a limit circuit. A phase compensation means having a transfer function 't- which is a combination of a gain adjustment circuit and a disturbance prevention circuit is provided in the system stabilizing device, and the output signal of this system stabilization device is sent to a stage subsequent to the disturbance prevention circuit in the automatic voltage tJ4 adjustment device. The exciter of the synchronous machine is characterized by the fact that it has been added.