JPS5984595A - Method of producing printed circuit board - Google Patents

Method of producing printed circuit board

Info

Publication number
JPS5984595A
JPS5984595A JP19563082A JP19563082A JPS5984595A JP S5984595 A JPS5984595 A JP S5984595A JP 19563082 A JP19563082 A JP 19563082A JP 19563082 A JP19563082 A JP 19563082A JP S5984595 A JPS5984595 A JP S5984595A
Authority
JP
Japan
Prior art keywords
printed wiring
etching resist
circuit board
printed circuit
wiring board
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP19563082A
Other languages
Japanese (ja)
Inventor
邦雄 川口
上山 宏治
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Resonac Corp
Original Assignee
Hitachi Chemical Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Chemical Co Ltd filed Critical Hitachi Chemical Co Ltd
Priority to JP19563082A priority Critical patent/JPS5984595A/en
Publication of JPS5984595A publication Critical patent/JPS5984595A/en
Pending legal-status Critical Current

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  • Manufacturing Of Printed Circuit Boards (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【発明の詳細な説明】 本発明は印刷配線板の製造法、%げ印刷配醒板の回路形
成におけるフォトレジストの剥離工程の改善に胸する。
DETAILED DESCRIPTION OF THE INVENTION The present invention is directed to a method for manufacturing printed wiring boards, and to an improvement in the photoresist stripping process in circuit formation of printed wiring boards.

一般に印刷配線板の回路形成工程は内層板の場合と外層
板の場合とに用いられるが、いrれもf”i+密度印刷
配線板にあ・いては感光性樹脂フィルム(感光性フォト
レジスト)k銅彊積層板土にラミネートし写真焼付法に
より回路パターンに対応したエツチングレジストχ形成
しエツチングすることにより回路パターンケ形成する工
程會経て製作逼れる。この除、エツチング後に不皆とな
ったエツチングレジスト(感光性ドライフィルム)を塩
化メチレン等の溶剤で剥離するが、一般に剥離は塩化メ
チレン等?浸漬、スプレ一方式等で行い、その後自然放
置してこの浴剤を気化させている。一方鋼張積層也はガ
ラスクロスにフェノール、エポキシ、ポリイミド等の牧
・1脂會含茂させて製造されるか、この樹脂はエツチン
グレジスト(ドライフィルム)の剥離に用いる塩化メチ
レン等のMj MQ K長時間さらされると樹脂の物性
が低下する。内層板の場合はこの工程の次に接看前処理
ケ行い勢処理佐7Il]熱圧涜により積層されるか、前
述のように樹脂の特性が低下したものχ積層すると層間
剥離、ミーズリング等半田耐熱性が低下することが多か
ったO 外層板においても同jMKエツチングレジ′スト剥離後
自然放百16と剥離液が銅張積層板の樹脂の特性全低下
きせ半田耐熱性を低下させる原因となっていた。
Generally, the circuit forming process for printed wiring boards is used for both inner and outer layer boards, but in both cases, photosensitive resin film (photosensitive photoresist) is used for f''i+ density printed wiring boards. The manufacturing process is completed by laminating the copper plate on a laminated board, forming an etching resist corresponding to the circuit pattern by photoprinting, and etching to form the circuit pattern.Excluding etching resist that is incomplete after etching. (Photosensitive dry film) is peeled off using a solvent such as methylene chloride, but generally, peeling is done by dipping or spraying, and then left to stand naturally to vaporize the bath agent.Meanwhile, steel cladding Laminated resin is manufactured by impregnating glass cloth with a resin such as phenol, epoxy, polyimide, etc., or this resin is used for long-term exposure to MJ MQ K such as methylene chloride used for removing etching resist (dry film). If the inner layer plate is heated, the physical properties of the resin will deteriorate.In the case of an inner layer plate, this step is followed by a pre-contact treatment. When stacking layers, the soldering heat resistance often deteriorated due to delamination, measling, etc. Also for the outer layer, the same jMK etching resist was spontaneously released after peeling, and the peeling solution completely deteriorated the properties of the resin of the copper-clad laminate. This caused a decrease in solder heat resistance.

特に近年ラインが自動化させ剥離工程Vζおける剥啼磯
ケ通過した後基板は槓み爪ねる方式をとることが多いた
め壕丁゛ま丁剥離液の気化か遅れ>Itt1張積層板積
層板の劣化は人きく i−vている。
Particularly in recent years, lines have become automated, and after passing through the peeling process in the peeling process Vζ, the substrate is often pinched and bent, so there is a delay in the vaporization of the peeling liquid > Deterioration of the laminate I listen to people iv.

本発明はこのような点に鑑みてなされたもので、銅張禎
層叡1/i’感光性樹脂フィルムrラミネートし、写A
現U法により回路パターンに対応したエラテンブレジス
[r形成し、エツチングし、エッチングレジストケ剥離
液により除去する印刷配線板の製造法に於て、剥離液に
よるエツチングレジスト除去俊、目」刷配線板を加i1
.ikすることケ特鐵とするものである。
The present invention has been made in view of the above points, and consists of laminating a copper-clad layered layer 1/i' photosensitive resin film, and
In the manufacturing method of printed wiring boards in which an etching resist corresponding to a circuit pattern is formed by the current U method, etched, and removed with an etching resist stripping solution, the etching resist is removed using a stripping solution. Kai1
.. It is a special feature to do this.

即ち、エツチング後不要となったエツチングレジスト(
ドライフィルム)を剥離する工程Vtおいて塩化メチレ
ン等の浴剤Vl授償又はスプレ一方式にて処理した佼、
′e、を切り、直ちに熱風忙加λ−ることにより丁みや
かば塩化メチレン等の昭剤孕気化させ除去するものであ
る。この方法により従来のエツチングSJl鵬1+ライ
ン全その了i吠用してよυ品耐熱+<J: n印刷配線
板の形1ノ又が可能となる。
In other words, the etching resist (
In the step of peeling off the dry film (Vt), it was treated with a bath agent such as methylene chloride (Vl) or a spray method,
'e' and immediately heated with hot air to vaporize and remove the cloves, methylene chloride, and other additives. By this method, it is possible to use the entire conventional etching SJ1+ line to produce heat-resistant printed wiring boards.

はl +fu tよ、本発明の印刷配線板の製造法全実
施するたみの装置の簡略断+に+図であり、+ttS、
レジスト剥紐装置庭、2は剥島W7俟スプレーノズル、
3は熱風乾燥機である。
is a simplified cross-sectional view of an apparatus for carrying out the entire printed wiring board manufacturing method of the present invention; +ttS;
Resist stripping device garden, 2 is stripping island W7 spray nozzle,
3 is a hot air dryer.

不発明による剥離ラインγ用いて多層印刷配彫JI&の
P′3層板ケ加工したときの印刷配線板の半田耐熱試験
結果全従来法と比軟すると次表の履りである。
The solder heat resistance test results of the printed wiring board when processed using the uninvented peeling line γ on the multilayer printing and engraving JI&'s P' 3-layer board are as shown in the following table when compared with all conventional methods.

以上説明したように、エッチングレジメ11膨俊直ちに
剥饋W液ケ熱風等により気化させることによrll従米
従来は260℃における牛田劇藺試験で約50秒しか耐
えなかったものか、1分以上耐え、不発ゆ」により印刷
配線板の半田耐熱性倉人幅π向土することができた。
As explained above, etching regimen 11: Immediately peel off the liquid by vaporizing it with hot air, etc. Conventionally, it lasted only about 50 seconds in the Ushida test at 260°C, but it lasted for more than 1 minute. Due to its durability and non-explosion, it was possible to improve the solder heat resistance of printed wiring boards by a width of π.

【図面の簡単な説明】[Brief explanation of drawings]

図面は、不発つ」の方法全実施するだめの簡略tノ「1
川図である。 符号の説明 1、 レジスト剥離装+fi 2、剥離液スプレーノズル 6、  熱ノy、J)ξ)−燥1寓さ
The drawing is a simple method for not carrying out the method ``1.
It is a river map. Explanation of symbols 1, resist stripping device + fi 2, stripping liquid spray nozzle 6, heat, J) ξ) - drying 1

Claims (1)

【特許請求の範囲】[Claims] 1、 納張積1層板W感光性樹脂フイルムヶラミネート
シ、写真焼付法により回路パターンに対応したエツチン
グレジスト’に形成し、エツチングし、エツチングレジ
ストr剥離液により除去する印刷配線板の製造法に於て
、剥離液によるエツチングレジスト除去後、印刷配鋼板
k 7JIl温することr%黴とする印刷配線板の製造
法。
1. A printed wiring board production method in which a single-layer photosensitive resin film laminate is formed into an etching resist corresponding to a circuit pattern using a photoprinting method, etched, and removed using an etching resist stripping solution. A method for manufacturing a printed wiring board, in which after removing the etching resist with a stripping solution, the printed wiring board is heated to a temperature of 7 JIl to make it moldy.
JP19563082A 1982-11-08 1982-11-08 Method of producing printed circuit board Pending JPS5984595A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP19563082A JPS5984595A (en) 1982-11-08 1982-11-08 Method of producing printed circuit board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP19563082A JPS5984595A (en) 1982-11-08 1982-11-08 Method of producing printed circuit board

Publications (1)

Publication Number Publication Date
JPS5984595A true JPS5984595A (en) 1984-05-16

Family

ID=16344356

Family Applications (1)

Application Number Title Priority Date Filing Date
JP19563082A Pending JPS5984595A (en) 1982-11-08 1982-11-08 Method of producing printed circuit board

Country Status (1)

Country Link
JP (1) JPS5984595A (en)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5072169A (en) * 1973-10-31 1975-06-14
JPS52120366A (en) * 1976-04-01 1977-10-08 Ibigawa Electric Ind Co Ltd Method of producing through hole printed circuit board

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5072169A (en) * 1973-10-31 1975-06-14
JPS52120366A (en) * 1976-04-01 1977-10-08 Ibigawa Electric Ind Co Ltd Method of producing through hole printed circuit board

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