JPS60183627A - Bit map memory control system - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION Technique 1 (Field 1) The present invention relates to a control method for a focus map memory built into a laser beam printer, a CRT controller, etc. 2. In particular, it relates to a method for shortening erasing time by a large amount. It is.

Conventional wave It? Traditionally, focus map memory C has been
Printers and CRT controllers (1) As the image resolution increases, the capacity increases. There, the map memory has a high speed,
Dynamic I;! ΔM is often used, and there are 11.

The timing for erasing the memory is to output the data in the bitmap memory, and then use J, -] to select Ji? i picture A
After L, write erase data 2) and /1
There are 11 people. For that, for erasure? '? This results in a loss of 11 seconds until the start of writing the next drawing data (9), resulting in a lack of high speed (4'1).

[1] An object of the present invention is to solve the above-mentioned drawbacks of the prior art, to provide a device with a built-in focus map memory, and to reduce the amount of time it takes to erase a focus map using a simple and inexpensive method. The configuration of the present invention will be described below with reference to FIGS. 1 to 4. This will be explained in terms of 3Y phase using the diagram.

FIG. 1 is a functional block diagram of a laser beam printer showing one embodiment of the present invention.

Host that receives data signals from host side 7 = (interface controller 1 to roll module 5, 11 that stores drawing textures)
- Infcourse control that transfers data from massi memory module 3 to laser beam 15 and printer 6
- Module 4, ROM containing 18 processing blocks, RΔM module 2, 11. It is composed of C: I3, IJ module I, and Monbus 8. FIG. 2 shows the I) M A (D i
recL.

FIG. 3 is a circuit diagram showing a peripheral circuit corresponding to the dynamic 1 and ΔM1 bit in the Pino 1-map memory module 3 of FIG. Figure 4 shows the dynamic RA in the bitmap memory module 3 of Figure 1.
It is written by ``Ruri M ni Oruri''. CI in Figure 1] By IJ module 1 -v'c, common bus 8
The data for drawing in the map memory module 3 is transferred to the pinot 1 via the M A bus 9 to the /F control module, which receives the synchronized clock of the laser beam printer 6. L) Enable MA data transfer.

The 1/F control module 4 controls the output to the laser beam printer 6, and at the same time controls the laser beam printer 6 by multiplying by 1, ±5 of 1) MΔ data transfer operation, and transmitting data. The operation of parallel-to-serial conversion of the J data and the 31 Mh operation of inverting the serial data by 01 to the synchronous clock and outputting the same are repeated.

The I/F controller 1-role module 4 in FIG.
Laser beam - Prior to sending data to the printer 6, it sends out I/Response and read (R, F, Δ()) signals to the pin 1-map memory module 3 (leads 1 to 1 in Fig. 4). The Pino 1-map memory module 3, which is composed of the dynamic RAM + 2 of the IJ-
RAS (R
ow AcJdr (Iss S trobe) iQ, next CAS (C01, umn Δaddress S
Sirobe) generates a signal, ρ, atto 1 of bin 1 ~
D pick the drawing data specified in Nosbus.
On the data bus of
TI3) Notify by No. 7 (RAS, CAS in Figure 1)
, output data, see strobe).

t/F controller that received the strobe (STB) signal ~
The roll module 4 latches the contents on the 11-pin data bus, performs parallel-to-serial conversion using the synchronized clock from the laser beam printer 6, and sends out serial data.

At the same time, by sending back (Wll, TTE) signals to the bitmap memory module 3 to the line 1,
Erased data can also be written to the same address specified by the C-bit address bus. In addition, the third
In one example of the figure, the pull-up resistor It provides 1
11H is written.

In the present invention, the data for drawing is output by executing the DMA data transfer operation from the map memory module 3, including the read operation and the write (that is, erase) operation, in a series. Therefore, even if the capacity is large, there is no need to provide separate time for erasing, and the high-speed performance of the device can be improved. Two can be done.

Effects-1 As explained above, according to the present invention, bitmap memory can be erased 11 by a simple and inexpensive method.
．． 1 to 11J, and the processing operation speed can be increased.

[Brief explanation of the drawing]

FIG. 1 is a functional block diagram of a laser beam printer showing an embodiment of the present invention, and FIG. 2 is a DMA of FIG. 1.
A signal line configuration diagram for transfer. Figure 3 is a circuit diagram showing the peripheral circuit for dynamic RAM I bin 1- in Figure 1. Figure 4 is a circuit diagram showing the peripheral circuits for dynamic RAM I bin 1 in Figure 1. !
This is the title Chart I- by til1. 1: C1'U module, 2: R, OM, RAM
Module, 3: Bitmasop memory module, l
ll/l” con 1 roll module, 5: boss
T/I” controller 1-roll module, 6: Laser beam printer, 7: Host side, 8: Common bus, 9
:DMA bus, 10: Data bus, 12: Dynamic RΔM0 Figure 1 Figure 2 Figure 3 Figure 4 Light

Claims (1)

[Claims] (+) In the control 5l177 for storing waste information in the pin 1 map memory and outputting the information, an input means for inputting erased data to the pin 1 map memory; In response to a request from Biso1-map memory,
The control means stores the data transferred from the pintomassi memory to DMA and sends it out after temporarily storing it. Via 1-map memory control J whose function is to control the manual means to perform erasure of the bitmap memory in a specified state.
i type.