JPS60186036A - 半導体基板の製造方法 - Google Patents

半導体基板の製造方法

Info

Publication number
JPS60186036A
JPS60186036A JP59040544A JP4054484A JPS60186036A JP S60186036 A JPS60186036 A JP S60186036A JP 59040544 A JP59040544 A JP 59040544A JP 4054484 A JP4054484 A JP 4054484A JP S60186036 A JPS60186036 A JP S60186036A
Authority
JP
Japan
Prior art keywords
substrate
insulating film
metal
semiconductor
film
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP59040544A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0580828B2 (fr
Inventor
Tetsutada Sakurai
桜井 哲真
Katsutoshi Izumi
泉 勝俊
Mamoru Obara
小原 護
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NTT Inc
Original Assignee
Nippon Telegraph and Telephone Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Telegraph and Telephone Corp filed Critical Nippon Telegraph and Telephone Corp
Priority to JP59040544A priority Critical patent/JPS60186036A/ja
Publication of JPS60186036A publication Critical patent/JPS60186036A/ja
Publication of JPH0580828B2 publication Critical patent/JPH0580828B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00Isolation regions in semiconductor bodies between components of integrated devices
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/01Manufacture or treatment

Landscapes

  • Element Separation (AREA)
JP59040544A 1984-03-05 1984-03-05 半導体基板の製造方法 Granted JPS60186036A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP59040544A JPS60186036A (ja) 1984-03-05 1984-03-05 半導体基板の製造方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59040544A JPS60186036A (ja) 1984-03-05 1984-03-05 半導体基板の製造方法

Publications (2)

Publication Number Publication Date
JPS60186036A true JPS60186036A (ja) 1985-09-21
JPH0580828B2 JPH0580828B2 (fr) 1993-11-10

Family

ID=12583388

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59040544A Granted JPS60186036A (ja) 1984-03-05 1984-03-05 半導体基板の製造方法

Country Status (1)

Country Link
JP (1) JPS60186036A (fr)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE4002673A1 (de) * 1989-01-31 1990-08-02 Mitsubishi Electric Corp Halbleiteranordnung und verfahren zu ihrer herstellung
JPH02303141A (ja) * 1989-05-18 1990-12-17 Fujitsu Ltd 半導体装置の製造方法
JPH071275A (ja) * 1993-06-21 1995-01-06 Sumitomo Metal Mining Co Ltd 電解用アノードの搬送装置
JP2007514321A (ja) * 2003-12-10 2007-05-31 ザ、リージェンツ、オブ、ザ、ユニバーシティ、オブ、カリフォルニア ミックスド・シグナル集積回路のための低クロストーク回路基板

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE4002673A1 (de) * 1989-01-31 1990-08-02 Mitsubishi Electric Corp Halbleiteranordnung und verfahren zu ihrer herstellung
DE4002673C2 (de) * 1989-01-31 1998-01-22 Mitsubishi Electric Corp Verfahren zur Herstellung einer Halbleiteranordnung
JPH02303141A (ja) * 1989-05-18 1990-12-17 Fujitsu Ltd 半導体装置の製造方法
JPH071275A (ja) * 1993-06-21 1995-01-06 Sumitomo Metal Mining Co Ltd 電解用アノードの搬送装置
JP2007514321A (ja) * 2003-12-10 2007-05-31 ザ、リージェンツ、オブ、ザ、ユニバーシティ、オブ、カリフォルニア ミックスド・シグナル集積回路のための低クロストーク回路基板

Also Published As

Publication number Publication date
JPH0580828B2 (fr) 1993-11-10

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Legal Events

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