JPS60202902A - Ceramic varistor - Google Patents

Ceramic varistor

Info

Publication number
JPS60202902A
JPS60202902A JP59061436A JP6143684A JPS60202902A JP S60202902 A JPS60202902 A JP S60202902A JP 59061436 A JP59061436 A JP 59061436A JP 6143684 A JP6143684 A JP 6143684A JP S60202902 A JPS60202902 A JP S60202902A
Authority
JP
Japan
Prior art keywords
ceramic varistor
varistor
ceramic
view
electrode
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP59061436A
Other languages
Japanese (ja)
Inventor
相川 千博
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP59061436A priority Critical patent/JPS60202902A/en
Publication of JPS60202902A publication Critical patent/JPS60202902A/en
Pending legal-status Critical Current

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Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【発明の詳細な説明】 産業上の利用分野 本発明はセラミックバリスタ、特に小形でプリント配線
板に直接装着し得るリードレスのサージ電圧吸収素子に
関する。
DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a ceramic varistor, and more particularly to a small leadless surge voltage absorbing element that can be directly mounted on a printed wiring board.

従来例の構成とその問題点 電子機器の小形・軽量・薄形化指向に対応して構成部品
の高密度実装が行われて、高密度実装を容易にするため
に、各種部品のチップ化が進展している。サージ電圧吸
収用素子についてもリード端子のないチップ素子が望ま
れている。
Conventional configurations and their problems In response to the trend toward smaller, lighter, and thinner electronic devices, component parts have been mounted at high density.In order to facilitate high-density mounting, various parts have been made into chips. Progress is being made. Chip elements without lead terminals are also desired for surge voltage absorbing elements.

第1図(−)は従来のセラミックバリスタの平面図、第
1図(ロ)はその正面断面図である。同図に示すセラミ
ックバリスタは酸化亜鉛などを主成分とする角板状の電
圧非直線抵抗素子1に端面を介して、対面の一部まで連
接するように設けられた電極2を形成したものである。
FIG. 1(-) is a plan view of a conventional ceramic varistor, and FIG. 1(b) is a front sectional view thereof. The ceramic varistor shown in the figure is a square plate-shaped voltage nonlinear resistance element 1 whose main component is zinc oxide or the like, and an electrode 2 that is connected to a part of the opposite side through the end face. be.

この場合、第1図におけるil>tlの関係を成立する
必要がある。つまシ、これが逆の関係になった場合はバ
リスタ特性はI!、1間のみしか機能しない結果になり
、サージ吸収能力が低くなる。
In this case, it is necessary to establish the relationship il>tl in FIG. Tsumashi, if this relationship is reversed, the ballista characteristics will be I! , the result is that it only functions for one period, resulting in a low surge absorption capacity.

ところで、酸化亜鉛を主成分とする焼結体のセラミック
バリスタは、優れた非直線性とサージ吸収性能を有する
ところから、サージ電圧吸収用素子として広く実用され
ているが、焼結体が脆く、チップ部品とする場合は実用
に則した厚みを確保しなければならない。しかし、第1
図におけるC、>tlの関係、即ち同一面で相対する電
極の間隔を素子の厚みよりも大きくする必要があり、結
果として焼結体がバリスタとして機能する有効面積は少
なくなる。これはり−ドレスのチップ素子が小形で高密
度実装を意図することから、その目的を十分に果してい
るとはいえないため、最近では第2図に示すように、素
子の面積をより有効に活用し、角板状のセラミックバリ
スタ素子の相対向する面に電極を配設し、かつ同一面で
相対する電極間部分に溝を形成し、前記同一面での電極
間をセラミックバリスタ素子の厚みより小さくしたもの
がある。
Incidentally, ceramic varistors, which are sintered bodies containing zinc oxide as a main component, are widely used as surge voltage absorbing elements because of their excellent nonlinearity and surge absorption performance, but the sintered bodies are brittle and When used as a chip component, it is necessary to ensure a thickness suitable for practical use. However, the first
The relationship C in the figure >tl, that is, the distance between electrodes facing each other on the same plane needs to be larger than the thickness of the element, and as a result, the effective area where the sintered body functions as a varistor decreases. This cannot be said to have fully fulfilled its purpose, as the chip elements of this type of dress are small and intended for high-density mounting.Recently, as shown in Figure 2, the area of the element has been utilized more effectively. Then, electrodes are arranged on opposing surfaces of a square plate-shaped ceramic varistor element, grooves are formed between the electrodes facing each other on the same surface, and the distance between the electrodes on the same surface is made smaller than the thickness of the ceramic varistor element. There is something smaller.

第2図体)は前記セラミックバリスタの平面図、第2図
(b)はその正面断面図で、第1図と同一部分は同一番
号を付する。このセラミックバリスタは酸化亜鉛に、ビ
スマス、コバルト、マンガン、アンチモンなどの酸化物
を微量添加し、混合し、油圧成形して1100〜14o
O°Cで焼成し、切断加工して所定厚みの角板状素子1
を得る。この素子1の表面及び裏面に第2図に示すよう
に一端部を少し残して表裏が対称になる位置に溝3を設
け/こ。溝3はダイヤモンド刃を高速回転させて切削し
設けた。このようにして得た素子1の表面および裏面に
、銀ペーストを所定のパターンで印刷し、1だ端面には
銀ペーストを転写法によって塗着して電極2を得た。こ
れを700〜900 ’Cで熱処理して第2図に示すよ
うなチップ状セラミソ゛クバリスタを作る。このように
して作られたセラミックバリスタは小形化という点につ
いては十分であるけれども、価格を考えると焼結体の切
断加工及びダイヤモンド刃による溝切り加工等の工程が
有り、量産性が満足なものとはいえない。
Figure 2 (body 2) is a plan view of the ceramic varistor, and Figure 2 (b) is a front sectional view thereof, where the same parts as in Figure 1 are given the same numbers. This ceramic varistor is made by adding small amounts of oxides such as bismuth, cobalt, manganese, and antimony to zinc oxide, mixing them, and hydraulically forming them at 1100 to 14 o
Sintered at 0°C and cut into a rectangular plate-like element 1 with a predetermined thickness.
get. As shown in FIG. 2, grooves 3 are provided on the front and back surfaces of this element 1 at positions where the front and back sides are symmetrical, leaving a small portion at one end. The groove 3 was cut by rotating a diamond blade at high speed. Silver paste was printed in a predetermined pattern on the front and back surfaces of the element 1 thus obtained, and the silver paste was applied to the other end face by a transfer method to obtain an electrode 2. This is heat treated at 700-900'C to produce a chip-shaped ceramic sonic varistor as shown in FIG. The ceramic varistor made in this way is sufficient in terms of miniaturization, but considering the price, it requires processes such as cutting the sintered body and grooving with a diamond blade, so mass production is not satisfactory. I can't say that.

発明の目的 本発明は従来例の問題点に鑑み、素子の面積をより有効
に活用し、より小形で同等の性能を確保した、小形高性
能のチップ状サージのセラミックバリスタを安価に供給
することを目的とするものである。
Purpose of the Invention In view of the problems of the conventional example, the present invention provides a small, high-performance chip-shaped surge ceramic varistor at a low cost, which makes more effective use of the area of the element and secures the same performance in a smaller size. The purpose is to

発明の構成 上記目的を達成するために、本発明はシートを積層後切
断した角板状のセラミックバリスタ素子と、前記セラミ
ックバリスタ素子の相対面に形成されだ第1.第2の電
極を有し、前記セラミックバリスタ素子の同一面で相対
する前記第1.第2の電極の間隔部分に溝をシートの切
れめで設け、前記溝が前記バリスタ素子の厚みよりも小
さくしたものである。
Structure of the Invention In order to achieve the above object, the present invention includes a ceramic varistor element in the form of a rectangular plate obtained by stacking sheets and cutting them, and a first ceramic varistor element formed on the opposing surface of the ceramic varistor element. The first electrode has a second electrode and faces the first electrode on the same surface of the ceramic varistor element. A groove is provided at the interval between the second electrodes by cutting the sheet, and the groove is made smaller than the thickness of the varistor element.

実施例の説明 以下本発明の一実施例について、第3図(a) 、 (
b)と第4図(a) 、 (b)を参照して説明する。
DESCRIPTION OF EMBODIMENTS An embodiment of the present invention will be described below with reference to FIGS. 3(a) and (
This will be explained with reference to FIGS. 4(a) and 4(b).

第3図(−)はシートで積層したセラミックバリスタの
平面図で、第3図(b)はその正面断面図である。第3
図は酸化亜鉛VC、ビスマス、コバルト、マンガン、ア
ンチモンなどの酸化物を微量添加し、混合し、溶剤に溶
かし、湿式でシート状に成形し、寸法℃3に切断したも
のを最上段部と最下段部に溝寸法℃2の間隔をとり配置
する。積層後、寸法13と同寸法でA舎B、Cの箇所で
切断して1100°C〜1400°Cで焼成して角板状
の素子4を得る。この素子40表面及び裏面に第4図に
示すように銀ペーストを所定のパターンで印刷し、また
端面には銀ペーストを転写法によって塗着して電極2を
得る。これを700〜900°Cで熱処理して第4図に
示すようなチップ状セラミックバリスタを得る。この時
の素子4の厚みtlは1.5鴎、溝3の中1.0關。
FIG. 3(-) is a plan view of a ceramic varistor laminated with sheets, and FIG. 3(b) is a front sectional view thereof. Third
The figure shows the top and bottom parts of a sheet in which trace amounts of oxides such as zinc oxide VC, bismuth, cobalt, manganese, and antimony are added, mixed, dissolved in a solvent, wet-formed into a sheet, and cut to a size of 3 °C. The grooves are arranged at intervals of ℃2 in the lower part. After lamination, it is cut at locations A and B and C with the same dimensions as dimension 13, and fired at 1100° C. to 1400° C. to obtain a square plate-shaped element 4. Silver paste is printed in a predetermined pattern on the front and back surfaces of this element 40 as shown in FIG. 4, and the electrode 2 is obtained by applying silver paste to the end surface by a transfer method. This is heat-treated at 700 to 900°C to obtain a chip-shaped ceramic varistor as shown in FIG. At this time, the thickness tl of the element 4 is 1.5 mm, and the thickness tl of the groove 3 is 1.0 mm.

溝3の深さ0.5mmである。この素子4に所定電圧を
印加した時のもれ電流は素子厚みtl の特性に相当す
るものであった。またインパルスを加えた時も溝3(相
対する電極間)で放電することなく、負荷を増大した時
は素子部で破壊した。これは、表裏面の対向電極2間で
バリスタが機能していることを証明するものである。
The depth of the groove 3 is 0.5 mm. The leakage current when a predetermined voltage was applied to this element 4 corresponded to the characteristics of the element thickness tl. Further, even when an impulse was applied, there was no discharge in the groove 3 (between opposing electrodes), but when the load was increased, the element was destroyed. This proves that the varistor is functioning between the opposing electrodes 2 on the front and back surfaces.

発明の効果 上記詳述した通り、本発明によれば角板状の素子面積を
有効に活用し、より小形のり−ドレスバリスタ(サージ
吸収素子)を安価に供給することができる。
Effects of the Invention As detailed above, according to the present invention, the area of the rectangular plate-like element can be effectively utilized, and a smaller glue-dressed varistor (surge absorption element) can be provided at a lower cost.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図(a)は従来のセラミックバリスタの平面図、第
1図山)はその正面断面図、第2図(a)は他の従来の
セラミックバリスタの平面図、第2図(b)はその正面
断面図、第3図0は本発明の一実施例の積層バリスタ素
子の平面図、第3図(b)はその正面図、第4図(−)
は本発明の一実施例のセラミツクツ(リスクの平面図、
第4図(b)はその正面断面図である。 1 ・・セラミックバリスタ素子、2・・・・・・電極
、3−・−溝、4・・・・積層セラミツクツ(リスク素
子。 代理人の氏名 弁理士 中 尾 敏 男 ほか1名第1
Fig. 1(a) is a plan view of a conventional ceramic varistor, Fig. 1(a) is a front sectional view thereof, Fig. 2(a) is a plan view of another conventional ceramic varistor, and Fig. 2(b) is a plan view of a conventional ceramic varistor. 30 is a plan view of a multilayer varistor element according to an embodiment of the present invention, FIG. 3(b) is a front view thereof, and FIG. 4(-)
is a plan view of ceramics (risk) of one embodiment of the present invention;
FIG. 4(b) is a front sectional view thereof. 1... Ceramic varistor element, 2... Electrode, 3... Groove, 4... Laminated ceramics (risk element. Name of agent: Patent attorney Toshio Nakao and 1 other person 1st)
figure

Claims (1)

【特許請求の範囲】[Claims] シートを積層後切断した角板状のセラミックバリスタ素
子と、前記セラミックバリスタ素子の相対面に形成され
た第1.第2の電極を有し、前記セラミックバリスタ素
子の同一面で相対する前記第1.第2の電極の間隔部分
に溝をシートの切れめで設け、前記溝が前記バリスタ素
子の厚みよりも小さくなるよう構成したセラミックバリ
スタ。
A square plate-shaped ceramic varistor element obtained by laminating and cutting the sheets, and a first ceramic varistor element formed on the opposing surface of the ceramic varistor element. The first electrode has a second electrode and faces the first electrode on the same surface of the ceramic varistor element. A ceramic varistor, in which a groove is provided at the interval between the second electrodes by a cut in the sheet, and the groove is smaller than the thickness of the varistor element.
JP59061436A 1984-03-28 1984-03-28 Ceramic varistor Pending JPS60202902A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP59061436A JPS60202902A (en) 1984-03-28 1984-03-28 Ceramic varistor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59061436A JPS60202902A (en) 1984-03-28 1984-03-28 Ceramic varistor

Publications (1)

Publication Number Publication Date
JPS60202902A true JPS60202902A (en) 1985-10-14

Family

ID=13171011

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59061436A Pending JPS60202902A (en) 1984-03-28 1984-03-28 Ceramic varistor

Country Status (1)

Country Link
JP (1) JPS60202902A (en)

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