JPS60254231A - Control system for floating point arithmetic - Google Patents

Abstract

PURPOSE:To attain the numerical processing over a wide range by giving one or plural exponent parts to the data showing the floating point number of one and multiplying the numerical value of a mantissa part by the product of the numerical values obtained by defining each exponent part as a power number to obtain the floating point number. CONSTITUTION:The data to be calculated are set to registers 10 and 20 and the product of both registers are outputted to a register 30 with a floating decimal point multiplier. A multiplier circuit 31 execute the multiplication for a mantissa part of the number to be calculated and outputs the result of multiplication to a normalizing circuit 32. A code calculating circuit 33 decides a code. The exponent parts are supplied to the exponent processing circuits 11 and 21 from registers 10 and 20 respectively, and an effective exponent part is decided and calculated for control of gates 12 and 22. While the obtained exponent value is transferred to an exponent adder circuit 34 and then to an exponent dividing circuit 35 in the form of a sum of both exponent values. Here a shift amount for normalization is subtracted from said exponent value for correction. Then the exponent is divided and a mantissa is transferred to the register 30 from the circuit 32 to obtain a product of the number of floating decimal points.

Description

[Detailed Description of the Invention] +al Industry/Industry Field The present invention relates to a control method for floating point arithmetic in an electronic computer system, and in particular, control that can expand the range of displayable numerical values of data displaying floating point numbers. Regarding the method.

As the performance and economy of electronic computer systems improve, the fields of application in the field of scientific and technical computing are expanding to areas that are increasingly complex and require a large amount of calculation. Along with this, the range of numerical values handled in calculations also tends to expand.

Furthermore, as the logic of calculations increases in complexity, it tends to become extremely complicated to predict the range of numerical values that will occur in the calculation results or the process of calculation, and a means to eliminate or assist in predicting the numerical range is desired. ing.

(b) Prior Art In conventional computers, floating point number data has a format shown in FIG. 2, for example, and there is generally a fixed numerical range of floating point numbers determined by each machine system.

That is, in FIG. 2, ■ is a sign part indicating the sign of this floating point number, 2 is an exponent part, and 3 is a mantissa part, each of which has a fixed bit length.

Now, according to the predetermined rules, the numerical value represented by each part is expressed as the sign part S.
, exponent E, and mantissa F, then the floating point number represented by this format is SX MExp. Here, H is a radix specific to this method, and is, for example, 16.

Therefore, the size of floating point numbers that can be displayed in this format,
If E is limited by the range of possible numerical values, and if the minimum value of E is L and the maximum value is U, then the numerical range is ML <
Numerical value < MU.

If the result of an operation exceeds a predetermined numerical range during program execution, the resulting value cannot be displayed correctly as a floating point number, so program execution is interrupted and a so-called exception event occurs. , either leave the rest to the program or, if possible, force the result to a default value and continue running the program.

Assuming that the usable range of numbers determined by the calculator is a reasonable size, if the range of numbers that will occur during program execution is all predicted, then by using appropriate program logic, , it is possible in conventional applications to keep the numerical range handled by the program within a predetermined range, and therefore there is validity in the method of treating numerical values exceeding the predetermined range as an abnormal event as described above. was there.

However, for this reason, when programming, it is necessary to predict the possible size range of the numerical values to be handled, including intermediate results during program execution, and based on that prediction, if necessary, program Of course, some programming ingenuity was needed to keep the numerical values handled within a predetermined range.

(C) Problems to be Solved by the Invention The present invention solves an operation W4 that processes a display format that can expand the range of floating point numbers displayed by data.
It is an object of the present invention to provide an m-method and to make it possible to process a wide range of numerical values without requiring the conventional programming techniques described above.

(Means for solving the d1 problem) This purpose is to have one or more exponent parts in data representing a floating point number of l, and to calculate the product of each numerical value determined using each of the exponent parts as a base, as a mantissa part. This is achieved by the floating point arithmetic control system of the present invention, which is configured to multiply the value of the floating point number to obtain the value of the floating point number.

+e) In other words, the representation format of a floating point number is made up of a mantissa part of 1 and one or more exponent parts, and the value of each exponent part is
z, E3, ------ When the value of the floating point number represented by the data is S X Ml" X Mz" X M3E"
-X P. However, S is the sign, F is the value of the mantissa, and Ml
, M2, H8, etc. are base numbers specific to each exponent part.

Therefore, the range can be expanded by selecting the number of exponent parts of data representing a numerical value according to the required size range.

Furthermore, as is clear from the above equation, since the exponents are in an additive relationship, it is extremely easy to add the method of the present invention to conventional arithmetic functions.

(f) Embodiment FIG. 1 shows the representation format of floating point numbers in one embodiment of the present invention. In the figure, S and F are the sign and mantissa, respectively, as in Figure 2, and El, pg, It
, indicates the exponent part. The format examples in (a), (b), and (C) in the figure assume that they have the same bit length (for example, 64 pintos), and show how the number of exponent parts and the corresponding bit length of the mantissa part differ. There is.

In this example, it is assumed that there can be up to three exponent parts. The configuration of each part is, for example, the sign part S is 1 bit, the exponent part B is
+ is 7 bits, exponent parts Ea and E are each 8 bits, and the remaining 56 to 40 bits are the mantissa part.

There are various ways to express the exponent part, but generally the second
It would be desirable to use the same concept as the conventional floating-point number data shown in the figure for the convenience of realizing related processing functions. In this embodiment, in accordance with one widely adopted format of expression, the exponent part E1 is assumed to be a value E which is the sum of the possible values of the true exponent value -64 to +63 and 64. Therefore, EI takes a value from 0 to 127.

However, in this example, E1=0 and E,=127 indicate exponent values of -64 and +63, respectively, and indicate that exponent parts P and z are valid as exponent parts,
In addition, in this case, in order to use the 8 bits as effectively as possible, the second part is considered to be an antilog number, and the absolute value is displayed when E = O is a negative number, and when EI = 127 is a positive number. It shall be.

Next, when the exponent part E2 is valid, that is, when E = 0 or 127, if the E2 part has a maximum value of 255, it indicates the exponent value -255 or +255 as described above, and the exponent part [! 3 indicates that it is valid as an exponent. The meaning of the numerical value of the exponent part E3 in this state is the same as in the case of E2.

Although the value of the base number may be different for each exponent part, in this embodiment, the same value is used. Setting the bases of all exponent parts to the same value has the advantage of simplifying the processing of the exponent parts. The base value is usually 2 for convenience in handling binary numbers.
fi is used.

In this embodiment, for example, if the base number is -.16, the exponent value will display the decimal point position of a so-called hexadecimal number in which the binary number of the mantissa part F is divided into 4-bit units.

In this example, the value of the mantissa is, for example, at the leftmost position (highest position)
Assume that a number is displayed with a decimal point to the left of the bits.

As a result of the above, the absolute value of the floating point number displayed in the data format of FIG. 1 (C1) is as follows, and its sign is determined by the sign part S.

M (El-64) X MEN' X MEM' Xp
=M(El-6414!2'+!3' ×p=15(E
l-641+EZ'+E3' XpHowever, Ex', E
3° indicates a value having a sign determined by the above convention, with the values of E2 and E3 as absolute values.

The values in the format of FIG. 1(b) or (a) are the above!
! 3° or B 3+ and E2' can be taken as 0.

FIG. 3 is a block diagram of a floating point multiplication device which is an embodiment of the present invention. The operand data having the above format is set in registers 0 and 20, and the product is set in register 3.
It is assumed that the output is 0.

As is well known in the multiplication of floating point numbers, the mantissa of the product can be obtained by multiplying the mantissas of the two-wave operation numbers, the exponent of the product can be obtained by adding the exponents, and the sign part of the product can be obtained by processing the sign part. can.

In the figure, a multiplication circuit 31 is a circuit that has a function of performing multiplication on the mantissa values taken out from the registers 10 and 20 of the operands and outputs the product to the normalization circuit 32, and a sign calculation circuit 33 is a circuit that has the function of outputting the product to the normalization circuit 32. This is a circuit that receives the sign part of the arithmetic number as input, determines the sign of the multiplication result, and sets the sign part of the output register 30, and various types of circuits known in the art can be used.

In this device, there are three types of lengths of the exponent part and correspondingly the length of the mantissa part according to the above format, so when calculating the exponent and inputting the mantissa to the multiplication circuit 31,
Requires control according to length. For this purpose, the exponent processing circuits 11 and 21 input and process portions corresponding to the exponent parts E, -E3 from the registers 10 and 20, respectively. Since the circuits 11 and 21 have the same function, the circuit 11 will be mainly described below.

The exponent processing circuit 11 determines the effective exponent part from the input,
Calculating the exponent value and inputting it to the exponent addition circuit 34, and controlling the gate 12 (gate 22 in the case of the exponent processing circuit 21) according to the effective length of the mantissa determined by the number of effective exponent parts, Upper 8 or 1 of inputs to multiplication circuit 31
It has a function of blocking the passage of 6 bits (setting the input of the part to all 0s).

FIG. 4 is a flowchart of processing inside the exponent processing circuit 11.

First, in step 40, portions E1 to B of the register 10 are input. By steps 41 and 42, that E.

It is determined whether the part is O or 127. If neither of these is the case, only part 61 is an effective exponent part, so in step 43 all gates 12 are set to pass, and in step 44 parts E2 and E8 of the input are rewritten to 0 for later calculations.

If the 86th part is O or 127, it is determined in step 45 whether the 12th part of the 0th order 8 bits is 255. If it is not 255, El and the 12th part are valid exponent parts, so in step 46 the gate 12 is set to pass only the part corresponding to 83rd part, and in step 47 the input [! Set the third part to O.

If the 12th part is 255, all three exponent parts are valid, so the gate 12 is placed in a blocked state at step 48.

After the above control, it is determined in step 50 that the input is E.

If the part is O, the E2.83 part must be a negative number, so in step 51 the exponent value is subtracted by -([!24E3+64). If the ε1 part is not O, the exponent value is calculated by EI+82+E3-64 in step 52.

Note that [!] used in this calculation. 2, the value of E3 is a value that may be rewritten to 0, as explained in the above control.

The obtained index value is transferred in step 53 as one input of the index addition circuit 34. An exponent value obtained by processing similar to the above for the exponent part of the register 20 is transferred from the exponent processing 1 circuit 21 to the other input of the exponent addition circuit 34 .

The exponent addition circuit 34 is constituted by an ordinary adder, obtains the exponent value of the product of the operands of the registers 10 and 20 as the sum of the re-input exponent values, and transfers it to the exponent division circuit 35.

The normalization circuit 32 mainly consists of a shift register, holds the product of the mantissas transferred from the multiplication circuit 31, shifts it to the left by 4 bits, and converts it into a so-called normal state in which the significant digits are included in the most significant 4 bits. This is a circuit that obtains the mantissa in converted form. Shifted amount for normalization (number of 4-bit shifts)
is transferred to the exponential division circuit 35.

The exponent division circuit 35 corrects the exponent value transferred from the exponent addition circuit 34 by subtracting the shift amount, and then performs exponent division processing. FIG. 5 is a flow chart of the division processing of the index division circuit 35.

In steps 60 and 61 of FIG. 5, the magnitude of the corrected index value is determined. If -64〈exponent value〈63, the exponent part can be displayed only as E, so step 6
2, 64 is added to the exponent value to generate [E, 2] and set in the 83rd section of the output register 30.

If the exponent value is <-63, 0 is set as E in the 81st part of the register 30 in step 63, and the exponent value is updated to =(exponent value +64) in step 64. 62〈In the case of an exponent value, 12 is stored in the ε1 part of the register 30 in step 65.
7, and in step 66 set the index value (exponent value - 63)
Update to.

In both cases, the ε2 part is included in the output, so in order to free up that area, the normalization circuit 32 is controlled in step 67 to shift the mantissa on the shift register to the right by 4 bits.

In step 68, it is determined whether the updated index value is greater than 254, and if it is not, the index can be displayed in up to 12 parts, so
In step 69, the index value is set in the 12th part of the register 30.

254〈If it is an exponent value, register 30 is stored in step 70.
Set 12 copies to 255. In step 71, the exponent value is updated to (exponent value - 255) and the value to be set is entered in the exponent part E3.

Step 72 checks whether this value exceeds the limit value. If it exceeds 255, it cannot be displayed in 68 parts of 8 bits, that is, it is a floating point number that exceeds the range specified in this embodiment. Therefore, step 7
Step 3 starts the exception handling operation. The exception handling may be a known method that performs determination by setting predetermined status information, for example.

If the exponent value does not exceed 255, the exponent value is set in the 83rd part of the register 30 in step 74, and the mantissa of the normalization circuit 32 is further shifted to the right by 4 bits in step 75.

As described above, the processing of the exponent division circuit 35 has been completed and all the exponent parts have been set on the output register 30. Next, the mantissa is transferred from the normalization circuit 32 to the register 30 to complete the product of floating point numbers.

(Effects of the Invention As is clear from the above explanation, according to the present invention, the range of usable numerical values can be easily expanded in floating-point number operations, and Since there is no longer a need to predict the range of data, there is a significant industrial effect of expanding the application range of the computer system and improving its ease of use.

[Brief explanation of the drawing]

FIG. 1 is a diagram showing a data format of a floating point number in an embodiment of the present invention, FIG. 2 is a diagram of an example of a conventional floating point number data format, and FIG. 3 is a block diagram of a multiplication device in an embodiment of the present invention. 4 is a flowchart of the processing of the exponent processing circuit, and FIG. 5 is a flowchart of the processing of the exponent division circuit. In the figure, 1 is the sign part, 2 is the exponent part, 3 is the mantissa part, 10.20 is a register, 11.21 is an exponent processing circuit, 12.22 is a gate, 30 is an output register, 31 is a multiplication circuit, and 32 is a multiplication circuit. 33 is a sign calculation circuit, 34 is an exponent addition circuit, 35 is an exponent division circuit, 4
0 to 75 indicate processing steps. 5 Ryo 1 Eye treatment zT! ! J Tea 3 Zutei 4 Japanese

Claims (2)

[Claims] (1) In a device that executes arithmetic operations on a floating point number having an exponent part and a mantissa part, data representing a floating point number of 1 has one or more exponent parts, and each of the exponent parts is used as an act number. 1. A floating-point arithmetic control system, characterized in that the floating-point number is determined by multiplying the value of the mantissa by the product of determined numerical values. (2) Each of the plurality of exponent parts of the data displaying the floating point number has a predetermined control order with one specific exponent part at the top, and each exponent part other than the specific exponent part has the control order. It is characterized in that it is configured such that all the exponent parts preceding it in the ranking are valid when each has a predetermined value, and all the exponent parts become part of the mantissa part in a state where they are not valid. A floating point arithmetic control method according to claim (1).