JPS6033737A - Frequency synthesizer - Google Patents

Abstract

PURPOSE:To attain miniaturization and low cost by providing a circuit changing the frequency of a broad band freqency synthesizer by a minute step. CONSTITUTION:A reference frequency f1(=10MHz) from a reference oscillator 1 is converted into voltages V1, V1' having a phase difference of 90 deg. at a phase converter 2 and fed to balanced modulators 3a, 3b. On the other hand, a synthesizer 4 for 10kHz step is provided as a minute step frequency signal generator, and an output having a frequency f2(=4.00-4.99MHz) from the said synthesizer 4 is fed to D flip-flops 6a, 6b functioning as delay circuits via a 1/250 frequency divider 5, the signal whose phase is shifted by 90 deg. by the said flip-flops 6a, 6b is applied to the balanced modulators 3a, 3b via filters 7a, 7b. Then outputs VB, VB' of the balanced modulators 3a, 3b are synthesized and outputted to an application circuit (not shown) as a broad band RF signal V changed in a minute step.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a frequency synthesizer, and in particular, a phase-locked circuit (PLL).
oop) (including a general cover reception generation oscillator and a spectrum analyzer).

Conventionally, various frequency synthesizers using a phase-locked circuit PLL have been proposed, as shown in FIGS. 1(a) to 1(d), and each of these synthesizers has a frequency that is N times the reference frequency fi. Although it is possible to create N-fi, there is a problem in that the frequency can only be controlled at intervals of the reference frequency fi.

The symbol a in Fig. 1 (a) to (d) is the reference frequency oscillator (
O20), b is the phase comparator (φ/D>, C
is a low-pass filter (1, PF), d is a voltage-controlled oscillator (VCO), e is a frequency divider (1/N, 1/M), e' is a prescaler (1/p), and g is a frequency multiplier (× M), 1
1 is a frequency mixer (mixer), i is a local frequency oscillator (
local oscillation) are shown respectively.

Therefore, if the reference frequency fi is lowered, control can be performed at finer frequency intervals.

However, if you want to change the frequency suddenly, the response speed becomes an issue, so the reference oscillation frequency must be set as high as possible. become contradictory.

In other conventional synthesizers, as shown in Fig. 2, the reference frequency from the oscillator (O3C) a is 10 KHz,
In order to make micro steps, the output of voltage controlled oscillator d is set to 1.
It is also possible to obtain a 10Hz step using a frequency divider e of 1/1000, in which case N of the 1/N frequency divider e is set to 400.
~499, the output is 4.00~499KH
It becomes z.

However, as it is, the output frequency is very low, so
It is difficult to use in high frequency synthesizers.

Therefore, for example, a frequency mixer j takes charge of oscillation in units of 10Hz and 100Hz, a frequency mixer j takes charge of oscillation in units of IKHz and 10KHz, and a frequency mixer j takes charge of oscillation in units of IKHz and 100KHz.

A frequency mixer j responsible for oscillation in units of IMHz and 10MHz is used to obtain the desired frequency ν, but as shown in FIG. 3, the output from frequency mixer j is
Two frequencies f: (f+ +f2) and (f, -f2)
IT comes out.

When obtaining minute steps using PLI- with a high reference oscillation frequency, the output becomes a low 1 frequency as in the example above, resulting in (f+ +r2) and (fl - f2
) become close to each other.

Therefore, a filter must be connected to the output, and adjustment of the cutoff frequency of the filter is difficult and complicated.

The present invention aims to solve these problems, and provides a frequency synthesizer such as a wideband frequency synthesizer that realizes minute step changes with a simple configuration and is also capable of reducing costs. The purpose is to

Therefore, the frequency synthesizer of the present invention has a reference frequency oscillator that outputs a reference frequency signal, and two standards that receive the reference frequency signal from the reference frequency oscillator and have the same frequency and a phase difference of 90'. It is equipped with a phase converter that outputs a frequency signal, a microstep frequency signal generator that outputs a microstep frequency signal, and a step frequency signal that receives the step frequency signal from the microstep frequency signal generator and outputs a microstep frequency signal that has the same frequency and mutual position. a delay circuit that outputs two step frequency signals with a phase difference of 90°, first and second filters that receive each step frequency signal from the delay circuit and output a sine wave signal, and the reference frequency signal. a first modulator that performs modulation by receiving a phase-advanced one of the reference frequency signals and a slow-phase one of the sine wave signals; a second modulator that performs modulation based on the advanced state of the first modulator;
and the output ends of the second modulator are respectively connected to the output terminal.

Hereinafter, embodiments of the present invention will be explained with reference to the drawings.
FIG. 4 is a block diagram showing the main parts of a frequency synthesizer as the first embodiment of the present invention, and FIGS. 5 to 10 show specific examples of the frequency synthesizer as the @2 embodiment of the present invention. Figures 5 and 6 are a block diagram and electric circuit diagram of a specific example of the present invention, Figures 7 and 8 are a block diagram and electric circuit diagram of the PLL sub-block, respectively, and Figures 9 and 10 are the PLL main block, respectively. FIG. 2 is a block diagram and an electrical circuit diagram.

As shown in FIG. 4, in the first embodiment, a reference frequency oscillator 1 is provided, and the reference frequency f, (=10 MHz) from this oscillator 1 is separated by 90 MHz from each other by a phase converter 2.
It is converted into voltages v1 and I with a phase difference of ', and sent to balanced modulators 3a and 3b.

Also, 10KH as a minute step frequency signal generator
A z-step synthesizer 4 is provided, and the frequency f, (=4.00 to 4.99) from this synthesizer 4 is
MHz) is supplied to the D-7 lip 70 tube 6aI6b as a delay circuit via the 1/250 frequency divider 5, and the phase difference is reduced to 90 by the D-7 lip 70 tube 6a+6b.
The output signals pass through filters 7a and 7b to become respective voltages V21V2' and are sent to balanced modulators (p
The signal is sent to the IS2 modulator) 3b and the balanced modulator (first modulator) 3a.

The following equation holds true due to the 90° phase difference between each voltage v1 and T and the 90° phase difference between each voltage v2 and ν2'.

vl °V, cosω1L V+' =■, cos(ω, L+π/2)=V+ s
inω1t v2 = V 2 eO3ω2L V2' = V 2 cos(C+J 2t+yr /
2)=V2sinω2t Each of these voltages enters the balanced modulators 3a, 3b, and the output thereof is v, :v+XV2'=V1 cosω+L
・V2 sin (+Jztvll' = vI' XV
2=Vl sinωIt+v2cosω2t.

These signals are combined by connecting the output sides of the balanced modulators 3a and 3b, so that v=v +v'=V, V2cosω, te sinω2t+V+V2
SInωItLICO5ω2t”VIV25in(ωtsuta+ω2)t.

As can be seen from this equation, the phase shift method (P 1eas
eShift Netu+ork), (ω1+ω
Only the component 2), that is, only the upper sideband appears.

Kokoteha, f, = ω, /2 yr = 10MHz.

f, =ω2/2π=4.00KHz~4.99KHz
Therefore, the output is <L + f2)"
1.0.00400MHz~10.00499MHz
z will be obtained.

In addition, the frequency of the difference between the reference frequency f and the minute step frequency f2 (f + - f2) "9.99600 MHz
-9,99501 MHz does not appear at all due to the above configuration.

As shown in Figures 5 to 10, in the second embodiment, the terminals T and -T12 in each figure are connected to each other, and the same reference numerals as in Figures 1 to 4 are used in Figures 5 to 10. indicates almost the same thing.

As shown in FIGS. 5 and 6, the frequency synthesizer block inputs and outputs each frequency through terminals T1 to T, , T7.

Terminal T: 4.00 to 4.99 from PLL subblock
KHz input terminal T2: 4.00 to 4.99KH with a phase difference of 90° from the input from terminal T12 input terminal T: 400 to 499KH from the PLL subblock
z input terminal T: 30.00000~30.09999MH
The z output goes to the mixer of the PLL main block.The reference numeral 7c in FIG. 5 is a low-pass filter (LPF).
), 8 is an amplifier (AMP), 9 is a frequency mixer (MIX), and 10 is a band pass filter (BPF).
It shows.

As shown in FIGS. 7 and 8, the PLL sub-block performs input/output of each frequency and BCD (binary coded decimal) input for frequency setting through terminals T1 to T6.

Terminal 1': 4.00-4.99KHz output (10H
Terminal T2: Output of 4.00-4.99KHz with a phase difference of 90" from the input from terminal T1 (10Hz step) Terminal T3: Output of 400-499KHz (IKHz step) Terminal T: Frequency setting 2-digit BCD input terminal 1-5 for frequency setting (0-990KHz): 2-digit BCD input terminal T6 for frequency setting (0-990KHz): Input reference oscillation (40KH2) 7, reference numeral 5' indicates a frequency divider, 11 a phase comparator, 12 a frequency divider, 13 a low-pass filter (LPF),
14 indicates a voltage controlled oscillator (VC○).

The PLL main block, as shown in Figures 9 and 10,
There is a reference oscillator 4 which is the final output, and this oscillator 4 determines the overall performance.

Terminal T6: 40 KHz reference oscillation is supplied to the PLI sub-block. Terminal 'r8 = 2-digit BCD for frequency setting (0-9, 9 MHz). Input terminal T9: Frequency setting (50, 60, 70 MHz). Switching terminal T, o: Final output power 50.00000-79.99
999MH2゜4■p-p) Terminal 1', l: V CO switching (999MH2゜4■p-p)
When V is applied, it oscillates. ) Terminal 1゛1□: VCO switching (Adding 9■ here causes oscillation) Note that in FIG. 9, reference numeral 15 indicates a level converter, and 16 indicates a buffer amplifier, respectively.

In this way, in the second embodiment, the frequency (50,00000-79,
99999 MIIz) can be obtained, and the other effects of the second embodiment are almost the same as those of the first embodiment.

The frequency synthesizer of the present invention can be used as a frequency synthesizer application device, and if the frequency is adjusted and used as a local oscillator of a receiver with an intermediate frequency of 50 MHz, the frequency synthesizer of the present invention can be used as a general cover with a reception frequency of θ to 30 MHz. A receiver can be created.

Furthermore, if a microcomputer is used for frequency control, program reservations, search functions, automatic calling of all broadcast stations, etc. can be performed, and when combined with a transmitter, unmanned radio stations are also possible.

Furthermore, by using a frequency synthesizer, a spectrum analyzer can be created that can be used simply by pressing a key switch.

As detailed above, the frequency synthesizer of the present invention includes a reference frequency oscillator that outputs a reference frequency signal;
A phase converter that receives a reference frequency signal from the same reference frequency oscillator and outputs two reference frequency signals having the same frequency and a phase difference of 90" from each other, and a micro step that outputs a micro step frequency signal. A frequency signal generator, a delay circuit that receives a step frequency signal from the minute step frequency signal generator and outputs two step frequency signals having the same frequency and a phase difference of 90', and the delay circuit. first and second filters each receiving each step frequency signal from the reference frequency signal and outputting a sine wave signal, and receiving a phase-advanced one of the reference frequency signal and a slow-phase one of the sine wave signal. and a second modulator that performs modulation in response to one of the reference frequency signals having a slow phase and one of the sine wave signals having a leading phase. With a simple configuration in which the output ends of the first and second modulators are connected to the output terminals, the following effects and advantages can be obtained.

(1) Since the component of frequency (L − r, >) does not appear in the synthesized frequency, the minute step frequency f2 can be set to a considerably low frequency.

(2) Since the frequency of the voltage controlled oscillator can be relatively low, a CMOS type IC can be used in the circuit, reducing power consumption.1ii1! l
&? ,,1111)nb*1mrmdJ-/,111+
-7+, -- Downsizing and cost reduction are possible.

(3) Since an expensive and difficult-to-adjust filter is not required, size reduction and cost reduction are also possible from this point of view.

(4) The reference frequency can be lowered and the response speed can be increased.

[Brief explanation of the drawing]

Figures 1(a) to (d) and Figure 2 are block diagrams of a frequency synthesizer using a conventional phase-locked circuit PLL, Figure 3 is a frequency mixer, and Figure 4 is a block diagram of a frequency synthesizer using a conventional phase-locked circuit PLL. FIG. 5 is a block diagram showing main parts of a frequency synthesizer as a first embodiment of the present invention, FIGS. 5 to 10 show specific examples of a frequency synthesizer as a second embodiment of the present invention, and FIGS. Block diagrams and electrical circuit diagrams and vJ7.8 diagrams relating to parts of the present invention, respectively, are in their respective PLs.
Block diagram and electrical circuit diagram of L subblock, @9,
FIG. 10 is a block diagram and an electric circuit diagram of the PLL main block, respectively. Balanced modulator, 3b...
- Balanced modulator as second modulator, 4...l as microstep frequency signal generator 1. I K +-1z
Step synthesizer, 5.5'--1/250 frequency divider, 6a, 6b... D-7 lip 70 as delay circuit
Tsubu, 7a...first filter (LPF), 7b...second filter (LPF), 7c...low-pass filter,
8... Increase Tl1illL 9... Frequency mixer (MIX
), 10... band pass filter (BPF), 11...
Phase comparator, 12... Frequency divider, 13... Low pass filter (LPF), 14...'KffJII controlled oscillator (VC
O>, 15...Level converter, 16...Buffer amplifier. Agent Patent Attorney Yoshihiko Iinuma Figure 1 Figure 5 Figure 6 Figure 7 Figure 8 Figure 9 Figure 10

Claims (1)

[Claims] A reference frequency oscillator that outputs a reference frequency signal, and a phase converter that receives the reference frequency signal from the reference frequency oscillator and outputs two reference frequency signals having the same frequency and a phase difference of 90 degrees. A microstep frequency signal generator outputting a microstep frequency signal;
Receives the step frequency signal from the same minute step frequency signal generator and has the same frequency and a mutual phase difference of 90".
a delay circuit that outputs two step frequency signals, first and second filters that receive each step frequency signal from the delay circuit and output a sine wave signal; a first modulator that performs modulation in response to a signal having a slow phase among the reference frequency signals and a signal having a slow phase among the reference frequency signals; a second modulator that performs modulation in response to the
A frequency synthesizer, characterized in that output terminals of the first and second modulators are respectively connected to output terminals.