JPS6037240U - 混成集積回路 - Google Patents

混成集積回路

Info

Publication number
JPS6037240U
JPS6037240U JP1983128083U JP12808383U JPS6037240U JP S6037240 U JPS6037240 U JP S6037240U JP 1983128083 U JP1983128083 U JP 1983128083U JP 12808383 U JP12808383 U JP 12808383U JP S6037240 U JPS6037240 U JP S6037240U
Authority
JP
Japan
Prior art keywords
integrated circuit
hybrid integrated
metal layer
lower surfaces
substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1983128083U
Other languages
English (en)
Inventor
鳥羽　進
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fuji Electric Co Ltd
Original Assignee
Fuji Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fuji Electric Co Ltd filed Critical Fuji Electric Co Ltd
Priority to JP1983128083U priority Critical patent/JPS6037240U/ja
Publication of JPS6037240U publication Critical patent/JPS6037240U/ja
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/075—Connecting or disconnecting of bond wires
    • H10W72/07551—Connecting or disconnecting of bond wires characterised by changes in properties of the bond wires during the connecting
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/531—Shapes of wire connectors
    • H10W72/5363—Shapes of wire connectors the connected ends being wedge-shaped

Landscapes

  • Electric Connection Of Electric Components To Printed Circuits (AREA)
  • Wire Bonding (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。

Description

【図面の簡単な説明】
第１図は従来の混成集積回路の一例の部分断面図、第２
図は別の従来例の部分断面図、第３図は本考案の一実施
例の部分断面図、第４図は第３図に用いられるセラミッ
クブロックの素材の斜視図である。 １・・・絶縁基板、２・・・導体層、３・・・はんだ、
５・・・半導体チップ、６・・・アルミニウム線、７・
・・セラミックブロック、１０．　１１．　１２・・・
金属層。

Claims (1)

    【実用新案登録請求の範囲】
  1. 上下両面および該両面に垂直な面の少なくとも上下両面
    を連絡する一部に金属層が被着されたセラミックブロッ
    クが下面の金属層により基板上の回路導体に固着され、
    上面の金属層にボンディングされる導線により前記基板
    上に固着された半導体チップの上面電極と接続されたこ
    とを特徴とする混成集積回路。
JP1983128083U 1983-08-19 1983-08-19 混成集積回路 Pending JPS6037240U (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1983128083U JPS6037240U (ja) 1983-08-19 1983-08-19 混成集積回路

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1983128083U JPS6037240U (ja) 1983-08-19 1983-08-19 混成集積回路

Publications (1)

Publication Number Publication Date
JPS6037240U true JPS6037240U (ja) 1985-03-14

Family

ID=30290680

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1983128083U Pending JPS6037240U (ja) 1983-08-19 1983-08-19 混成集積回路

Country Status (1)

Country Link
JP (1) JPS6037240U (ja)

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