JPS603785B2 - Manufacturing method of semiconductor device - Google Patents

Manufacturing method of semiconductor device

Info

Publication number
JPS603785B2
JPS603785B2 JP58040158A JP4015883A JPS603785B2 JP S603785 B2 JPS603785 B2 JP S603785B2 JP 58040158 A JP58040158 A JP 58040158A JP 4015883 A JP4015883 A JP 4015883A JP S603785 B2 JPS603785 B2 JP S603785B2
Authority
JP
Japan
Prior art keywords
lead frame
lead
semiconductor device
manufacturing
leads
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP58040158A
Other languages
Japanese (ja)
Other versions
JPS58175841A (en
Inventor
直人 木村
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Kyushu Ltd
Original Assignee
NEC Kyushu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Kyushu Ltd filed Critical NEC Kyushu Ltd
Priority to JP58040158A priority Critical patent/JPS603785B2/en
Publication of JPS58175841A publication Critical patent/JPS58175841A/en
Publication of JPS603785B2 publication Critical patent/JPS603785B2/en
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W99/00Subject matter not provided for in other groups of this subclass
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/071Connecting or disconnecting
    • H10W72/0711Apparatus therefor
    • H10W72/07178Means for aligning

Landscapes

  • Wire Bonding (AREA)
  • Lead Frames For Integrated Circuits (AREA)

Description

【発明の詳細な説明】 この発明は半導体装置の製造方法に関するものである。[Detailed description of the invention] The present invention relates to a method for manufacturing a semiconductor device.

′ 従来、一般的な内部接続時のりードフレームの加熱
部への固定方法は第1図a,bに示すように平面板によ
って行なっていた。すなわちアイランドつりリード5に
接地したアイランド4上に半導体素子3を設け、リード
6、リード5を平面的にリードフレーム押え板1で押え
ていた。しかしながら、この方法によれば、第1図cに
示すようにリードフレームのリード厚みのバラツキを吸
収できず、全部のリード‘こは、圧力を加えることがで
きない。すなわち第1図cに示すようにアイランドつり
リード以外の複数のリード6には加圧されないリードが
存在する。したがって本発明の目的はかかる欠点を除去
した有効な半導体装置の製造方法を提供するもので、そ
の特徴は、加熱部上にリードフレームを搭載し該リード
フレームをリードフレーム押えで押える方法において、
複数のリードのそれぞれに加圧できるごとくリードの厚
さに応じて個別に弾性変形をする弾性材料で該複数のリ
ードを押えた半導体装置の製造方法にある。
' Conventionally, the common method for fixing the lead frame to the heating part during internal connection was to use a flat plate as shown in FIGS. 1a and 1b. That is, the semiconductor element 3 is provided on the island 4 which is grounded to the island suspension lead 5, and the leads 6 and 5 are held down by the lead frame holding plate 1 in a two-dimensional manner. However, according to this method, as shown in FIG. 1c, it is not possible to absorb variations in the lead thickness of the lead frame, and pressure cannot be applied to all the leads. That is, as shown in FIG. 1c, there are leads 6 other than the island suspension leads that are not pressurized. Therefore, an object of the present invention is to provide an effective method for manufacturing a semiconductor device that eliminates such drawbacks, and is characterized by the following steps:
The present invention provides a method for manufacturing a semiconductor device in which a plurality of leads are held down by an elastic material that is elastically deformed individually according to the thickness of the leads so that pressure can be applied to each of the leads.

次に、この発明の実施例を図面を用いて説明する。Next, embodiments of the present invention will be described using the drawings.

この発明の実施例構成は、第2図aに示すように剛性材
料で作られた突起7を有する2カ所の部分と、この部分
を除く全周にあたり設定されたパイプ状の弾性材料で作
られた部分から成っている。
As shown in FIG. 2a, the embodiment of the present invention has two parts having protrusions 7 made of a rigid material, and a pipe-shaped elastic material made of a pipe-shaped elastic material around the entire circumference except for these parts. It consists of two parts.

・この機構としては、第2図bに示すように2カ所の
重要個所であるアイランドつりリード5を剛性材料部分
7で押え、他のりード部6は、弾性材タ料の加圧時のニ
ゲ9を利用してリード部厚さのバラッキを吸収すること
で全リー日こ圧力を加える。
・As shown in Fig. 2b, this mechanism is such that the island hanging leads 5, which are two important parts, are held down by the rigid material parts 7, and the other lead parts 6 are held down when the elastic material is pressurized. By using Nige 9 to absorb variations in the thickness of the lead part, pressure is applied to the entire lead.

従って、各リードは加圧内に多少の相違はあるが圧力を
加えられて加熱部に固定される。
Therefore, each lead is fixed to the heating part by applying pressure, although there are some differences in the pressure applied.

0 なお、第2図a,cから明らかなようにパイプに斜
めのスリットを入れているのは、スリットのスキマにリ
ードがはいり込むのを防ぐためであり、さらにスリット
を入れることでパイプを網分化した弾性独立部品とする
ためである。
0 As is clear from Figures 2a and c, the purpose of making diagonal slits in the pipe is to prevent the lead from getting into the gap between the slits. This is to create differentiated elastic independent parts.

タ この発明によれば、重要な2ヵ所を剛性材料にて固
定できるので、アイランドが動くことがなく、安定な組
み立てを行なうことができる。
According to this invention, since two important locations can be fixed with rigid material, the island will not move and stable assembly can be performed.

【図面の簡単な説明】[Brief explanation of drawings]

第1図aは従来技術のリードフレーム押えを示す平面図
、第1図bは第1図aの断面図、第1図cは従来技術に
よるリードの押えの状態を示す断面図、第2図aはこの
発明の実施例によるリードフレーム押えを示す平面図、
第2図bは第2図aの断面図、第2図cは本実施例にお
けるリードの押えの状態を示す断面図である。 尚、図において、1……リードフレーム押え板、2・・
・・・・加熱部、3……半導体素子、4・・・・・・ア
イランド、5……アイランドつりリード、6……リード
、7・・・・・・剛・隆材料リードフレーム押え突起部
、8…・・・弾性材料のパイプ、9・・・・・・パイプ
のスリット、である。 弟ノ図 弟z図
FIG. 1a is a plan view showing a lead frame presser according to the prior art, FIG. 1b is a sectional view of FIG. 1a, FIG. a is a plan view showing a lead frame presser according to an embodiment of the present invention;
FIG. 2b is a cross-sectional view of FIG. 2a, and FIG. 2c is a cross-sectional view showing the state of holding the lead in this embodiment. In the figure, 1...lead frame holding plate, 2...
...Heating part, 3...Semiconductor element, 4...Island, 5...Island suspension lead, 6...Lead, 7...Rigid/ridged material lead frame presser protrusion , 8... A pipe made of an elastic material, 9... A slit in the pipe. Younger brother's drawing Younger brother's drawing

Claims (1)

【特許請求の範囲】[Claims] 1 加熱部上にリードフレームを搭載し該リードフレー
ムをリードフレーム押えで押える方法において、該リー
ドフレーム押えの該リードフレームと接する部分はパイ
プ状の弾性材料で作られており、該パイプ状の弾性材料
には該リードフレームと接する側から中央部に向って斜
めに複数のスリツトが設けられていることを特徴とする
半導体装置の製造方法。
1. In a method in which a lead frame is mounted on a heating section and the lead frame is pressed by a lead frame holder, the part of the lead frame holder that comes into contact with the lead frame is made of a pipe-shaped elastic material, and the pipe-shaped elastic material 1. A method of manufacturing a semiconductor device, characterized in that a plurality of slits are provided in the material diagonally from the side in contact with the lead frame toward the center.
JP58040158A 1983-03-11 1983-03-11 Manufacturing method of semiconductor device Expired JPS603785B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58040158A JPS603785B2 (en) 1983-03-11 1983-03-11 Manufacturing method of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58040158A JPS603785B2 (en) 1983-03-11 1983-03-11 Manufacturing method of semiconductor device

Related Parent Applications (1)

Application Number Title Priority Date Filing Date
JP58040157A Division JPS5936421B2 (en) 1983-03-11 1983-03-11 Semiconductor internal connection device

Publications (2)

Publication Number Publication Date
JPS58175841A JPS58175841A (en) 1983-10-15
JPS603785B2 true JPS603785B2 (en) 1985-01-30

Family

ID=12572951

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58040158A Expired JPS603785B2 (en) 1983-03-11 1983-03-11 Manufacturing method of semiconductor device

Country Status (1)

Country Link
JP (1) JPS603785B2 (en)

Also Published As

Publication number Publication date
JPS58175841A (en) 1983-10-15

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