JPS6043921A

JPS6043921A - Josephson decoding circuit

Info

Publication number: JPS6043921A
Application number: JP15291883A
Authority: JP
Inventors: Takuji Nakanishi; 中西　卓二; Masashi Yamamoto; 山本　眞史; Kazunori Miyahara; 一紀宮原; Shuichi Fujita; 修一藤田
Original assignee: Nippon Telegraph and Telephone Corp
Current assignee: NTT Inc
Priority date: 1983-08-22
Filing date: 1983-08-22
Publication date: 1985-03-08
Also published as: JPH0126205B2

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【発明の詳細な説明】本発明は、複数ｎ個のＡｔ　、Ａｔ・・・・・・・・・Ａｎと、複
数ｎ個の〜Ａｌ　、〜Ａ、・・・・・・・・・〜Ａｎと
を入力信号電流としく但し、ａ　＝２を表わし、また〜
Ａ＋　（ｉ　＝１．２・・・・・・・・・ａ）は、Ａｌ
の否定論理を表わす）、Ｂ　＋　＝　Ａ　＋　Ａ　＋　−−−△ｎ−、Ａｎ、Ｂ
　ｒ　＝　Ａｔ　Ａｔ　””””・Ａｎ　−＋　＝Ａｎ
、Ｂｉ　＝Ａ＋　Ａｔ　・・・・・・・・・Ａｏ−７〜
Ａｎ　−＋　Ａｎ　、Ｂｔ＝Ａ＋Ａ＋・・・・・・・・
・Δ、１−２〜八〇−７〜ＡＢｉ　＝Ａ、Ａ＋　・・・
・・・・・・Ａｏ−、〜△ｎ　−ｒ　ＡｎＩＡｎｓＢｓ　＝Ａ＋　Ａｔ・・・・・・・・・Ａｏ−１〜Ａｎ
−ｉ〜ＡＢ７−ΔＩＡ＋　・・・・・・・・・Ａｎ−＋
　〜△１１　−　＋　〜へ〇　−Ｉ　Ａｎ　・Ｉ３８−Ａ１　Δ、　・・・・・・・・・Ａｎ−ｉ　〜
Ａ　ｎ　−２〜Ａ１１−１〜Ａｎ　・１３ａ　−１＝　Ａｔ　〜Ａ＋　−−−〜Ａｎ　−＋　
”・ＡｎＨａ−＋　−へ”　Ａ　＋　〜△２　・・・・
・・・・・〜Ａｎ−ｔ　〜ＡＩ３　ｆｌ”　”　Ａ　＋
　”△ｒ　−−−〜Ａ　ｎ　−＋　〜Ａ　ｎの論理積で
表わされる出力信号電流を出力する、ジョセフソン索子
を用いて構成されたジョセフソンデコ−ド回路に関する
。[Detailed Description of the Invention] The present invention provides a plurality of n pieces of At, At......An, and a plurality of n pieces of ~Al, ~A,......~ Let An be the input signal current, where a = 2, and ~
A+ (i = 1.2......a) is Al
), B + = A + A + ---△n-, An, B
r = At At ””””・An −+ = An
, Bi =A+ At...Ao-7~
An −+ An , Bt=A+A+・・・・・・・・・
・Δ, 1-2~80-7~ABi =A, A+...
......Ao-, ~△n-r AnIAns Bs =A+ At...Ao-1~An
−i〜AB7−ΔIA+ ・・・・・・・・・An−+
〜△11 − + 〜〇 −I An ・I38−A1 Δ, ・・・・・・・・・An−i 〜
An −2~A11-1~An・13a −1= At~A+---~An−+
“・To AnHa−+ −” A + ~△2 ・・・・
・・・・・・〜An-t〜AI3fl” ”A+
The present invention relates to a Josephson decoding circuit constructed using a Josephson probe and outputting an output signal current represented by the logical product of Δr −−−−−A n −+ ∼A n .

このＪ、うなジョセフソンデコード回路として、従来、
第１図を伴なって次に述べる構成を有するｂのが提案さ
れている。As this J, Josephson decoding circuit, conventionally,
A device b having the configuration described below with reference to FIG. 1 has been proposed.

ただし、簡単のため、ｎ−３、従ってａ＝２′−８の場
合Ｃ述べる。However, for the sake of simplicity, C will be described in the case where n-3 and therefore a=2'-8.

′７Ｉなわち、Ａ、を入力として、Ａ、及び〜△、を出力する相補性信
号発生回路Δｌ　と、Ａ２を入力として、Ａ、及び〜パ
ノを出力Ｊる相補性信号発生回路Ｑ、と、Ａ６を入力と
して、Ａ、及び〜△１を出力４゛る相補性信号光１回路
ＱＩとを右ｊる。'7I, that is, a complementary signal generating circuit Δl which takes A as an input and outputs A and ~△, and a complementary signal generating circuit Q that takes A2 as an input and outputs A and ~Pano. , A6 as input, and complementary signal light 1 circuit QI which outputs A and ~Δ1.

この場合、相補性信号発生回路Ｑ１、Ｑ２及びＱ、のそ
れぞれは、ジョセフソン素子を用いて構成されている。In this case, each of the complementary signal generating circuits Q1, Q2, and Q is configured using a Josephson element.

また、ジョセフソン素子［＋＋、Ｆ＋５、Ｒ６，及びＥ
７Ｉを有する。In addition, Josephson elements [++, F+5, R6, and E
It has 7I.

しかして、ジョセフソン索子Ｅ＋＋及び１丑３４の制御
線が直列に接続されて、それらに相補性信号発生回路Ｑ
、からのＡ１が供給されるにうになされている。Thus, the control lines of the Josephson probes E++ and 1234 are connected in series, and are connected to the complementary signal generating circuit Q.
, A1 from , is supplied.

また、ジョセフソン索子Ｅｓｇ及びＥｒａの制御ｌＩ線
が直列に接続されて、それらに相？ｌｌｔ性信号発生回
路Ｑ１からの〜Ａ１が供給されるようになされている。Also, the control lI lines of the Josephson probes Esg and Era are connected in series and are in phase with each other. .about.A1 from the llt signal generating circuit Q1 is supplied.

ハらに、ジョセフソン索子ＩＥ＋＋及び［ｉｉの接合が
直列に接続されて、それらに相補性信号発生回路Ｑ、か
らのＡ２が供給されるようにイＣされている１３また、ジ」レフソン索子Ｅ＋ｉ及びＥ７ｇの接合か歯列
に接続されて、それらに相補性信号光１同１Ｉｌｌ　に
）　＋　からの〜Ａ２が供給されるようになされ（いる
。Furthermore, the junctions of the Josephson probes IE++ and [ii are connected in series and are connected in such a way that they are supplied with A2 from the complementary signal generating circuit Q. The junctions of the chords E+i and E7g are connected to the dentition so that they are supplied with complementary signal light 1Ill) ~A2 from +.

さらに、ジョゼフソン素子Ｅ１、Ｅ、・・・・・・・・
・１、をイＩＪる。Furthermore, Josephson elements E1, E,...
・1.

しかし゛（、ジョセフソン索子Ｅ、及びＲ２の制御２１
１線が直列に接続されて、ジョセフソン索子１−４．の
接合の両端に、抵抗Ｒ１２を介して接続され、また、ジ
ョセフソン索子Ｅ３及びＲ４のａ１制御線が直列に接続
されて、ジョセフソン索子に−１，の接合の両端に、抵
抗Ｒ３４を介して接続され（いる。However, ゛(, Josephson chord E, and control of R2 21
1 wires are connected in series to connect Josephson cords 1-4 . The a1 control lines of Josephson cables E3 and R4 are connected in series to both ends of the junction of Josephson cables E3 and R4, and a resistor R34 is connected to both ends of the junction of Josephson cables E3 and R4. Connected via (.

さらに、ジョセフソン素子Ｅ５及びＥＩの制御線が口１
り１１に接続されて、ジョセフソン素子Ｅ６．の制御線
の接合の両端に、抵抗Ｒ１ｌを介して接続され、また、
ジョセフソン索子Ｅ７及びＥＩの制御線が直列に接続さ
れて、ジョセフソン索子Ｆ＋＋　の接合の両端に、抵抗
ＦＢ＋　を介して接続されている。Furthermore, the control lines of Josephson elements E5 and EI are
Josephson element E6. is connected to both ends of the control line junction via a resistor R1l, and
The control lines of Josephson cables E7 and EI are connected in series and connected to both ends of the junction of Josephson cable F++ via resistor FB+.

３１：た、ジョセフソン索子Ｆ＋　、ｌＥｉ　、Ｅｈ　
及びＥＩが直列に接続されて、それらに相ｈＲｕ信号発
生回路Ｑ、からのＡｔ　が供給されるようになされてい
る。31: Josephson F+, lEi, Eh
and EI are connected in series so that they are supplied with At from the phase hRu signal generating circuit Q.

ざらに、ジョセフソン索子Ｆ２、［４、Ｒ６及びＥＩが
直列に接続されて、それらに相補性イ８号発牛回路Ｑ＋
　からのへ・△ヨが供給されるようになされている。Roughly speaking, the Josephson probes F2, [4, R6 and EI are connected in series, and their complementary A8 generator circuit Q+
It is designed so that karanohe and △yo are supplied.

また、ジョセフソン索子Ｅ＋　、［＋・・・・・・・・
・（二、の接合の両端が、それぞれ抵抗Ｒ，、Ｒ，・・
・・・・・・・Ｒ８を介して負荷ＩＶＩ＋、Ｍ２　・・
・・・・・・・Ｍ、に接続されている。Also, Josephson Sakuko E+, [+...
・(Both ends of the junction of 2 and 2 are resistors R,, R,...
......Load IVI+, M2 via R8...
......Connected to M.

以上が従来提案されているジョセフソンデコード回路の
構成である。The above is the configuration of the Josephson decoding circuit that has been proposed in the past.

このような構成によれば、相補性信号発生回路Ｑ＋、Ｑ
、及びＱ３に供給されるＡｔ　、Ａｔ及びＡ３を入力と
して、ＦＬ　＝Ａ＋　Ａｔ　ＡｔＢ２−△＋Ａ＋〜Ａ３Ｂ１＝Ａ＋　〜Ａ＋Ａ＋ｔ’３ｔ−Ａｔ　〜Ａ２〜Ａ＋［−３５−〜△＋　Ａｔ　ＡｔＢ６−〜Ａ＋Ａ＋〜Ａ。According to such a configuration, complementary signal generation circuits Q+, Q
, and with At, At, and A3 supplied to Q3 as inputs, FL = A+ At At B2-△+A+~A3 B1=A+ ~A+A+ t'3t-At ~A2~A+ [-35-~△+ At At B6-~A+A+~A.

１３７−〜Ａ１〜Ａ＋Ａ＋１３＋−’へ’　Ａ　＋〜Ａ２〜ＡＩの論理積で表わされる出力信号を、それぞれ負何Ｍ＋　
、Ｍｉ　、Ｍｉ　、Ｍｉ　、Ｍｉ　、Ｍｉ　、ｌＶｈ及
びＭｌに供給づることができる。137-~A1~A+A+ 13+-'to' A+~A2~AI The output signal expressed by the AND of
, Mi , Mi , Mi , Mi , Mi , lVh and Ml.

いま、その動作を、負荷Ｍ１に、Ｂ１が供給される場合
で例示して述べれば、次のとおりである。The operation will now be described as follows, illustrating the case where B1 is supplied to load M1.

！Ｊ’　＜ｒ　１つら、相補性信号発生回路Ｑ、及びＱ
。! J'< r One complementary signal generation circuit Q and one
.

から得られるＡ１及びＡ２にもとずぎ、ジョセフソン素
子１ヨ、２の接合が、有電圧状態から省電ｊｌ：状態に
転移することで、ジョセフソン素子Ｅ１、の接合の両端
からＡｔ　Ａｔの論理積出力が得られ、そしてその出力
Ａ＋Ａ＋　と、相補性信号発生回路Ｑ＋　から得られる
Ａｔ　とにもどずぎ、ジョセフソン索子Ｅ、の接合が、
零電圧状態から有電圧状態に転移することで、ジ：ｌｔ
？フソン素子Ｅ、の両端から、Ｂ＋　＝Ａ＋　Ａ２Ａ、
の論理出力が得られ、そしてそれが、負荷Ｍ１に供給さ
れる、という動作によって、負荷Ｍ１にＢ＋　＝Ａ＋　
Ａｔ　Ａｔで表わされる出力を供給することができる。Based on A1 and A2 obtained from , the junction of Josephson elements 1 and 2 transitions from the voltage-applied state to the power-saving jl: state, so that At At from both ends of the junction of Josephson element E1, The conjunction output of A+A+ and At obtained from the complementary signal generating circuit Q+ are combined with the Josephson probe E, as follows.
By transitioning from zero voltage state to voltage state, di:lt
? From both ends of Fuson element E, B+ = A+ A2A,
A logic output of B+ =A+ is obtained and supplied to the load M1.
An output represented by At At can be provided.

しかしながら、第１図に示Ｊ従来のジョセフソンデコー
ド回路の場合、ジョセフソン索子Ｅ１１　、Ｅｉ　１　
、Ｅｆ　１及び［７８から構成されている段と、ジョセ
フソン素子Ｅ＋　、Ｅｉ・・・・・・・・・［ｌから構
成されている段とが縦続接続された構成を有するので、
ジョセフソンデコード回路の構成が全体として複雑大型
化するとともに、段間の配線のインダクタンスの１こめ
に、高速動作しないなどの欠点を有していた′。However, in the case of the conventional Josephson decoding circuit shown in FIG.
, Ef 1 and [78, and a stage composed of Josephson elements E+, Ei . . . [l] are connected in cascade, so that
The construction of the Josephson decoding circuit as a whole was complicated and large, and the inductance of the wiring between the stages meant that it could not operate at high speed.

よって、本発明は、Ｊｌ述した欠点のない新規なジョセ
フソンデコード回路を提案せんとするもので、り１２図
を伴なって詳述するところから明らかとなるであろう。Therefore, the present invention seeks to propose a novel Josephson decoding circuit which does not have the above-mentioned drawbacks, which will become clear from the detailed description in conjunction with FIG.

第２図は、本発明によるジョセフソンデコード回路の一
例を示し、次に述べる構成を有する。FIG. 2 shows an example of a Josephson decoding circuit according to the present invention, and has the configuration described below.

但し、以ト簡単のため、第１図の場合と同様に、ｎ＝３
、従ってａ　＝２’　＝８の場合で述べ信刀なわら、ジョセフソン接合と制御線とを有りるジョセ
フソンスイッチＥ＋＋及びＥ′１１と、シュＩレフソン接合と制御ｌｌ　１ｍどを有するジョレ
ーノソンスイッチト２１及びＥ’ｌ＋　、及びＥ２２及
びＩＥ’＋＋　と、ジョセフソン接合とを有するジョセフソンスイッチ１：
３１及び１三ｌＩ　、Ｅｌ＋及びＥ’　ｒ　＋　、ト１
．及び１．ゲ］３、及びＥａ＋及びＥ’　ｉｔとをイ］
する。However, for the sake of simplicity, as in the case of Figure 1, n = 3.
, therefore, while a = 2' = 8, Josephson switches E++ and E'11 with Josephson junction and control line, Jolet with Schlefson junction and control line 1m, etc. Josephson switch 1 having Noson switch 21 and E'l+, E22 and IE'++, and Josephson junction:
31 and 13lI, El+ and E' r +, To1
．． and 1. 3, and Ea+ and E' it]
do.

この場合、ジョセフソンスイッチＥ＋　＋　、Ｅ２１及
びＥ２２、及びＥｆ、＋　、Ｅｆ　ｌ　、Ｅｆ　ｒ及び
Ｅａ＋のジョセフソン接合のそれぞれは、それに第１（
または第２）の方向く１′り下簡単のため第１方項とす
る）バイアス電流が供給され、且つ制御線に第１の方向
の制御電流が供給された場合、零電圧状態から有電圧状
態にスイッチづる閾値を有づる。In this case, each of the Josephson switches E+ + , E21 and E22 and the Josephson junction of Ef, + , Ef l , Ef r and Ea+ has a first (
Or, if a bias current (for simplicity, we will call it the first direction) is supplied, and a control current in the first direction is supplied to the control line, the voltage will change from zero voltage state to voltage applied. It has a threshold value that switches the state.

また、ジョセフソンスイッチＥ　’　ｌ　Ｉ　、Ｅ’２
１及びＥ’ｒ＋　、及び１三’　ｌＩｓ　Ｅｘ’　ｒ　
ｒ　、Ｅ′３３及びＥ　’　ｉ　＋のジョセフソン接合
のそれぞれは、それに第１の方向のバイアス電流が供給
され、且つ制御線に第２の方向（第１の方向とは逆）の
制御電流が供給された場合、零電圧状態から有電圧状態
にスイッチする閾値を有Ｊ−る。Also, the Josephson switch E' l I, E'2
1 and E'r+, and 13' lIs Ex' r
Each of the Josephson junctions r, E'33 and E'i+ has a bias current supplied to it in a first direction and a control current in a second direction (opposite to the first direction) in the control line. When supplied, there is a threshold value for switching from a zero voltage state to a voltage state.

また、入力信号電流Ａ１が第１の方向に、入力信号電流
〜Ａ１が第２の方向に供給される入力信号電流線１−１
　と、入力信号電流Ａ２が第１の方向に、入力信号電流〜Ａ２
が第２の方向に供給される入力信号電流線Ｌ２と、人力信号電流Ａ＋が第１の方向に、入力信号電流−・Δ
１が第２の方向に供給される入力信号電流線１．どを右
する。In addition, an input signal current line 1-1 to which the input signal current A1 is supplied in a first direction and the input signal current ~A1 is supplied in a second direction.
and, when the input signal current A2 is in the first direction, the input signal current ~A2
The input signal current line L2 is supplied with the input signal current A+ in the second direction, and the input signal current line L2 is supplied with the input signal current A+ in the first direction.
1 is supplied in the second direction. Which way is right?

この相合、入力信号電流路Ｌ１に入力信号電流△１及び
”−Ａ　＋　をそれぞれ第１及び第２の方向に供ｉｎ　
！ｌるための回路どしては、詳細説明は省略づ−るが、
図示のように、ジョセフソン接合と制御線とを有するジ
ョセフソンスイッチＧ１及び０′１ど、抵抗Ｒ４及びＲ
’　＋　とを含み、ジョヒーノソンスイッチＧ、及びＧ
’　ｌ　の制御線にぞれぞれ電流Ａ１及び〜Ａ、が供給
されるようになされた、所謂バッフルゲート回路を用い
１；する。In this combination, the input signal currents △1 and ``-A + are provided to the input signal current path L1 in the first and second directions, respectively.
! I will omit the detailed explanation of the circuit for
As shown, Josephson switches G1 and 0'1 with Josephson junctions and control lines, resistors R4 and R
'+, Johinoson switch G, and G
A so-called baffle gate circuit is used in which currents A1 and ~A are supplied to the control lines of 'l, respectively.

また、同様に、入力信号電流路［、に入力信号電流Ａ２
及び〜Ａ２をそれぞれ第１及び第２の方向に供給ｄ−る
ための回路としては、詳ＩＩＩＩＩ説明は省略するが、
図示のにうに、ジョセフソン接合と制御線とを有するジ
３　ｔフソンスイツヂＧ、及びＧ’　＋　と、抵抗Ｒ２
及びＲ’２　とを含み、ジ：３［ノソンスイッヂＧ２及
びＧ’　ｌの制御線にそれぞれ電流Ａ、及び〜Δ、が供
給されるにうになされた、所謂バッフルグー１〜回路を
用い得る。Similarly, the input signal current A2 is input to the input signal current path [,
A detailed explanation of the circuit for supplying d- and ~A2 in the first and second directions, respectively, is omitted, but
As shown in the figure, a diode switch G and G' + having a Josephson junction and a control line, and a resistor R2
and R'2, and the currents A and .DELTA. are supplied to the control lines of the switches G2 and G'1, respectively, so-called baffle circuits may be used.

さらに、同様に、入力信号電流路り、　ｒに入力信号電
流Ａ＋及び〜Ａ＋　をそれぞれ第１及び第２の方向に供
給するだめの回路としては、詳細説明は省略するが、図
示のＪ：うに、ジョセフソン接合と制御線とを有するジ
ョセフソンスイッチＧ＋及びＧ’＋　と、抵抗Ｒ１及び
Ｒ’＋　とを含み、ジョセフソンスイッチＧ、及びＧ’
　ｒの制御線にそれぞれ電流Ａ３及び〜Ａｌが供給され
るＪ：うになされた、所謂バッフルグー１〜回路を用い
（ｑる。Furthermore, similarly, as a circuit for supplying the input signal currents A+ and ~A+ to the input signal current path r in the first and second directions, respectively, detailed explanation is omitted, but as shown in FIG. , Josephson switches G+ and G'+ having Josephson junctions and control lines, and resistors R1 and R'+, Josephson switches G and G'
A so-called baffle loop 1 circuit is used, in which currents A3 and ~Al are supplied to the control lines of r, respectively.

しかしで、ジョセフソンスイッチＥ＋＋及びＥ′１１　
のジョセフソン接合が直列に接続されて、電流線１−２
　に介挿されている。However, with Josephson switches E++ and E'11
Josephson junctions are connected in series to form current line 1-2.
is inserted.

また、ジョセフソンスイッチＦ＋＋及びＥ′Ｉ＋の制御
線が直列に接続され−Ｃ，電流線１−５に介挿されてい
る。Further, the control lines of Josephson switches F++ and E'I+ are connected in series and inserted into -C and current line 1-5.

さらに、ジョ廿フンンスイッチＥ＋＋及嗅［′７４、及
び］三７．及びｌＥ’＋＋のジョセフソン接合が直列に
接続されて、電流線Ｌ３に介挿されｌいる。In addition, the switch E++ and smell ['74, and] 37. and lE'++ are connected in series and inserted into the current line L3.

また、ジョセフソンスイッチＥ＋＋及びＥ′２１の制御
線が直列に接続されて、抵抗Ｒ＋＋を介しく、ジ＝＋　
Ｌ＝フソンスイッチＥ＋＋　のジョしフソン接合の両端
に接続され、ジョセフソンスイッチ１冊、２及び［Ｅ’
＋＋の制御線が直列に接続されて抵抗Ｒ＋＋　を介して
ジョセフソンスイッチＩ’Ｅ’＋＋　のジョセフソン接
合の両端に接続されている。Also, the control lines of the Josephson switches E++ and E'21 are connected in series, and the control lines of the Josephson switches E++ and E'21 are connected in series to
L = Connected to both ends of Josephson junction of Josephson switch E++, Josephson switch 1, 2 and [E'
The ++ control line is connected in series to both ends of the Josephson junction of the Josephson switch I'E'++ through a resistor R++.

さらに、ジョセフソンスイッチＥ＋＋及びＥ＋＋　、Ｅ
＋＋及びＥ’　ｒ　ｒ　、ＥＩ　Ｉ及びＥ′、］、及び
Ｌｉ＋及び［′１４のジョセフソン接合か直列に接続さ
れて、バイアス電流線Ｂ１こ接続されている。Additionally, Josephson switches E++ and E++, E
The Josephson junctions of ++ and E' r r , EI I and E',], and Li+ and ['14 are connected in series and connected to the bias current line B1.

七１．た、ジ、、Ｊｔ？フソンスイッチＥ＋＋及びｌ三
′、１０制御線が直列に接続されて、抵抗Ｒ＋＋を介し
て、ジョセフソンスイッチ［２１のジョセフソン接合の
両端に接続されている。Seventy-one. T-J-Jt? The Josephson switch E++ and l3', 10 control lines are connected in series and connected across the Josephson junction of the Josephson switch [21] via a resistor R++.

さらに、ジョセフソンス・イッチＥ＋＋及びＥ′３２の
制御線が直列に接続されて、抵抗Ｒ１、を介して、ジョ
セフソンスイッチＥ′２１のジョセフソン接合の両端に
接続されている。Furthermore, the control lines of Josephson switches E++ and E'32 are connected in series and connected to both ends of the Josephson junction of Josephson switch E'21 via a resistor R1.

また、ジョセフソンスイッチＥ＋＋及びＥ′１、の制御
線が直列に接続されて、抵抗Ｒ＋＋を介して、ジョセフ
ソンスイッチＥ、２゛のジョセフソン接合の両端に接続
されている。Further, the control lines of Josephson switches E++ and E'1 are connected in series and connected to both ends of the Josephson junction of Josephson switches E and 2' through a resistor R++.

ざらに、ジョセフソンスイッチＥａ＋及びＦ′、４の制
御線が直列に接続されて、抵抗Ｒ３４を介して、ジョセ
フソンスイッチＥ′２２のジョセフソン接合の両端に接
続されている。Roughly speaking, the control lines of the Josephson switches Ea+ and F', 4 are connected in series and connected to both ends of the Josephson junction of the Josephson switch E'22 via a resistor R34.

また、ジョセフソンスイッチＥ＋　ｌ　、Ｅ’　ｒ＋　
、「ｒ　２、Ｌ’　ｈ　ｙ・・・・・・・・・［１４及
びＥ′３４のジョセフソン接合の両端が、それぞれ負荷
Ｍ＋　、ＭＩ　、ＭＩ　Ｍｔ・・・・・・・・・ＭＩ及
びＭＩに接続されている。Also, Josephson switches E+ l, E' r+
, ``r 2, L'h y......[14 and E'34's Josephson junction ends are respectively loaded M+, MI, MI Mt......MI and connected to MI.

以−りが、本発明によるジョレフソンデ］−ド回路の一
例構成であるが、このような構成ににれば、負荷Ｍ１に
Ａ＋　Ａ＋　Ａ＋で表わされている出力信号電流が、（′Ｊ荷Ｍ２にへ・Δ１〜Ａ２〜Ａ３で表わされている
出カイ８号電流が、に１荷Ｍ、に・・・△、〜Ａ＋Ａ＋で表わされている出
力信）Ｊ電流が、ｔｆ３す？Ｉ　Ｍ　ａにＡ１Ａ２〜Ａ＋　で表わされて
いる出力信号電流が、ｈ荷Ｍｓ　に〜Ａ＋　Ａｉ　Ａｉで表わされている出力
信号電流が、負荷Ｍ、にＡ１〜Ａ２〜Ａ１で表わされている出力信号
電流が、負荷Ｍ７にΔ１〜Ａ＋Ａ＋　で表わされている出力信号
電流が、１４　夕ｔ　Ｍ　ｌ　に〜Ａ＋Ａ＋〜Ａ、で表わされて
いる出力信号電流が、それぞれ得られるものである。The following is an example of the configuration of the Jollefsonde circuit according to the present invention. With such a configuration, the output signal current represented by A+ A+ A+ to the load M1 becomes ('J load The output No. 8 current represented by Δ1~A2~A3 goes to M2, and the output signal J current represented by Δ1~A+A+ becomes tf3. ? The output signal current represented by A1A2~A+ is applied to the load M, and the output signal current represented by Ai is applied to the load M, and the output signal current represented by A1A2~A1 is applied to the load M. The output signal current represented by Δ1~A+A+ is obtained at load M7, and the output signal current represented by ~A+A+~A is obtained at 14 tMl. It is.

因みに、Ａ１、〜Ａ２及びＡ３がそれぞれ電流路Ｉ１．
１．．．＋及びＬ３に、それぞれ第１の方向、Ｗｉ　２
の方向及び第１の方向に供給された場合、ジ三ルフソン
スイッチＥ’ｌｌ　、Ｅ’ｌｌ及びＥｒｇのジョセフソ
ン接合が零電圧状態から有電圧状態にスイッチし、他の
ジョ■コフソンスイッチのジョセフソン接合は＝　ｔｔ
ｉｒ＋状態の状態を保っているので、ｆ４　Ｍ　Ｍ　＋
　にＡ１〜ＡＨＡ１の出力信号電流が得られるものであ
る。Incidentally, A1, ~A2, and A3 are current paths I1.
1. ．．．． + and L3 respectively in the first direction, Wi 2
direction and the first direction, the Josephson junctions of the Josephson switches E'll, E'll and Erg switch from the zero voltage state to the voltage state, and the other Josephson switches The Josephson junction of = tt
Since it maintains the ir+ state, f4 M M +
The output signal currents A1 to AHA1 can be obtained in this case.

上述したように、本発明によれば、所期のデ」−ド回路
としての機能が得られ、そしてこのル仕場合、全体の回路が簡易であるので、嘴棟動作をざ氾る
ことができるという特徴を有する。As described above, according to the present invention, the desired function as a dead circuit can be obtained, and in this case, since the entire circuit is simple, the beak ridge operation can be avoided. It has the characteristic of being able to

なお、上述に於いては、本発明の一例を示したに留まり
、入力電流路に第１及び第２の方向の入力電流Ａ１及び
−Ａｉを供給する回路を、詳１１説明は省略するが、第
３図に示？ｌ構成とすることもでき、その他、本発明の
精神を脱づることなしに、種々の変型変更をなしくｑる
であろう。In addition, in the above description, only one example of the present invention has been shown, and a detailed explanation of the circuit that supplies the input currents A1 and -Ai in the first and second directions to the input current path will be omitted. Shown in Figure 3? 1 configuration, and various other modifications may be made without departing from the spirit of the invention.

[Brief explanation of drawings]

第１図は、従来のジョセフソンデー１−ド回路を示１接
続図である。第２図及び第３図は、本発明に依るジョ１２フソンデ］
−ド回路の実施例を示す接続図である。１出願人　日本
電信電話公社FIG. 1 is a connection diagram showing a conventional Josephson day circuit. FIG. 2 and FIG.
- FIG. 3 is a connection diagram showing an embodiment of a code circuit. 1 Applicant Nippon Telegraph and Telephone Public Corporation

Claims

[Claims] A plurality of n A+, A+ . . . An,
Multiple 11 ~A1, ~A, ...... ~An
and humanization F, 3. E-style, however, a=2'', and -・Δ, (i=1.2......a)
represents the negative theory 1!11 of A1), (31-△+A+ ・・・・・・・・・An −+ A
n, B+=At △+ ・= ・= −A n −+
~A n, 1(l-A1△r ---An -r ~A
n −+ An, 13+ −△1△2・・・・・・・・・
・An-+~An-+~At'3, -△1△r --
−An −r ~An −+ An−IAll, 1(I=△, Δr −−−An −1−An −r ~
ΔB+ −・A+ Δ+ −・=−An −+ ~A+
+ -y~AII -I An s 13th - 8I A!・・・・・・・・・An-s〜A
n-2~An-+ ~A n ・Ba -r =A+ ~A+ -・=・=~An −+
〜△11Ba −+ =〜A+ 〜A2−・=・〜
An −+ ・”ABa−〜A,〜A2 ・・・・・・
・・・A J, which is constructed using a Josephson element and outputs an output signal current represented by the logical product of -1 to All, has a Josephson junction and a control line in a Fuson decode circuit. Josephson switches Ea+ and F'11 and Josephson switches E+ and E'l with Josephson junctions and control lines.
+, and G. 2 and E', 2, and a Josephson junction and a control line. and f=' r + , and 13. , and F', 2, etc., DiF+ [Johinoson switch E with Fuson junction and control line 911. , and E'n+, and E. , and IE' It I, Ell 1 and E' o
r ---EII In and I='o+, (however, b=
Display 2TI-1? l), and a first input signal current line L1 that is supplied to the input signal current with 1 in a first direction and the human power signal current ~△1 in a second direction; a second input signal current line L2 to which the signal current A2 is supplied in a first direction and the input signal current ~・A+ is supplied in a second direction; and an n-th input current line Ln to which an input signal current ~A is supplied, and the Josephson switch L, ++:EII and Ei
r: Ei I, b+ l, Ei l and El
l:・・・・・・・・・：E n I, 'E II
I......[Enb] Each of the junctions has a bias current in the first (or second) direction supplied thereto, and a control line in the first (or second) ) is supplied with a control current in the direction of the Josephson switch [E' l I : E'
11 and E'++: E'++ ・E ' l l ・
E'+1, and E'+i: ・・・・・・・・・IE'
II I ,E'111・・・・・・E'n
Each of the h Josephson junctions has a first
When a bias current in the (or second) direction is supplied and a control current in the second (or first) direction is supplied to the control line, it has a threshold value that switches from the zero voltage state to the voltage applied state. , Johifusonsuzuji E++ and Ell's G 3t? The Fuson junctions are connected in series and inserted into the input signal current line of 2 above), and the control lines of 1) Jisanben Senoson switches E++ and Ell are connected in series,
inserted into the first input current line 1-1,
I: Note that the Josephson switches E++ and E'+1, and the Josephson junctions of G22 and IE'++ are connected to the tooth row, and the third input signal current 1!111-1 between the two
The control lines of the Jollefson switches E++ and E'+1 are connected in series, and the control lines of the Jollefson switches E++ and E'+1 are connected in series, and
a Josephson switch E++ is connected to both ends of the Josephson junction of the Josephson switch Fi+ and E'2. The control lines of G1]! are connected in a row through the resistor R1+. Connected to both ends of the Josephson junction of the -7 switch F'+1, the Lefson switches E++ and E++', and the Lefson switches E++ and E++', and the terminals 32 and 1 +', Eir and F. , ', and Ell and F,,' are connected in series and inserted into the fourth input signal current line It, and the control lines of the above J=>17son switch [3++ and E'32 are connected in series. The control lines of the Josephson switches E++ and [E'++ are connected in series, and the resistor R++
2 Josephson switch E'7. The Josephson junction of the Josephson switch lE++ is connected to both ends of the Josephson junction of the Josephson switch lE++, and the control lines of the Josephson switch lE++ are connected in series with the control lines of the Josephson switch lE++. and the above Josephson switch E=+i and E'!
4 control lines are connected in series and connected to both ends of the Josephson junction of the Josephson switch E'22 through the resistor R1.
−+) + and E'(n −+)+ , [E(n
−+)+ and E'(n −+)+ 't...-°= F(
n −+)(c −+) and E(n −+)(c −+
), and Josephson junctions of L(n-+)c and E(n-+)c are connected in series and inserted into the n-th input signal current line L11 (however, c'=' 2”
-2), Toji 3 It? Fuson switch EC1
-1) The control lines of 1 and E'(11-' l) l are connected in series, and through the resistor R (++-01) C1 is connected to the Gi3t?Fusson junction of the Josephson chord E(rl -1)l The control lines of the G3 Refson switch E(n-Q+ and E'(n-+)+ are connected in series through the resistor R(.-4)2, ': Josephson switch E(n - 1)! and E'(n -+) connected to both ends of the Josephson junction of
The 11 wires of l are connected in series, and the resistance R(n −+
) r through the Josephson switch F(.-2
)2 is connected to both ends of the diBt junction, and...
...The above Josephson switch E(n -1)(c
-1) and [E' (n -IMG -+) are connected in series, and the resistance R(n -+) (c -+
) through the Josephson switch E(n − r)
A Josephson switch E(n-+) is connected across the Josephson junction of d. and [:(n −+)
. The control lines of are connected in series to resistor R(.-1). , the above-mentioned job switch E' (n - r)
connected to both ends of the Josephson junction of a (however, d-2
n-3), the above Josephson switches E, 11 and Er. 1. Eo2 and E'n+...and IE
nb and E. The Josephson soy junctions of b are connected in series and inserted into the bias current line to form the above Josephson switch E. 1 and Flll are connected in series to both ends of the Josephson junction of the Josephson switch E(n −+) + through a resistor R6, and the control lines of the Josephson switches En+ and E'n+ are connected in series. control lines are connected in series, and the resistance Rr+
+ is connected to both ends of the Josephson junction of E'(n-+)+, and the control lines of the Josephson switch Er++ and IF'l'lI are connected in series to form a resistor. Rn+ is connected to both ends of the Josephson junction of E(.-1)2, and the Josephson switch En(II-+) and E' port (1+-
1) is connected in series to resistor Rn(b
-+>, -> switch E(
n −+) C is connected to both ends of the Runoson junction, and the above-mentioned Jonson switch E. And E'ni+
The control line of C1 is connected to the 11th column through the resistor Rnb.
'' - connected to both ends of the Josephson junction of the Josephson switch E'Cn -+) c, and the Josephson switches En+, E'n+, E,
n ), IE' n 2...Ellb
and E'nb, both ends of the Lefson junction are subjected to loads M1, M7 . Ml, M4...Ma-
+ and Ma, and when viewed as a whole, the output signals B+, B+, etc. are connected to the loads M + , M r .
・・・・・・・A Josephson decoding circuit characterized by outputting B1.