JPS6049663U - 配線基板 - Google Patents

配線基板

Info

Publication number
JPS6049663U
JPS6049663U JP1983143209U JP14320983U JPS6049663U JP S6049663 U JPS6049663 U JP S6049663U JP 1983143209 U JP1983143209 U JP 1983143209U JP 14320983 U JP14320983 U JP 14320983U JP S6049663 U JPS6049663 U JP S6049663U
Authority
JP
Japan
Prior art keywords
wiring board
glaze layer
semiconductor element
thinner
base
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1983143209U
Other languages
English (en)
Inventor
平尾 英紀
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sanyo Electric Co Ltd
Original Assignee
Tottori Sanyo Electric Co Ltd
Sanyo Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tottori Sanyo Electric Co Ltd, Sanyo Electric Co Ltd filed Critical Tottori Sanyo Electric Co Ltd
Priority to JP1983143209U priority Critical patent/JPS6049663U/ja
Publication of JPS6049663U publication Critical patent/JPS6049663U/ja
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00Package configurations
    • H10W90/701Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/754Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked insulating package substrate, interposer or RDL

Landscapes

  • Wire Bonding (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。

Description

【図面の簡単な説明】
第1図は従来の配線基板の断面図、第2図は本考案実施
例の配線基板の断面図である。 1・・・基台、2,3・・・グレーズ層、4,4・・・
配線   −パターン、5,5・・・半導体素子、6,
6・・・接着剤、7,7・・・金属細線。

Claims (2)

    【実用新案登録請求の範囲】
  1. (1)基台と、基台上に設けられたグレーズ層と、グレ
    ーズ層上に接着剤等で載置された半導体素子とを具備し
    、グレーズ層の半導体素子の載置場所はその周辺場所よ
    り厚みかうすい事を特徴とする配線基板。
  2. (2)前記グレーズ層の上には配線パターンが設けてあ
    り、半導体素子の周辺の配線パターン上にワイヤボンド
    されている事を特徴とする前記実用新案登録請求の範囲
    第1項記載の配線基板。
JP1983143209U 1983-09-13 1983-09-13 配線基板 Pending JPS6049663U (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1983143209U JPS6049663U (ja) 1983-09-13 1983-09-13 配線基板

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1983143209U JPS6049663U (ja) 1983-09-13 1983-09-13 配線基板

Publications (1)

Publication Number Publication Date
JPS6049663U true JPS6049663U (ja) 1985-04-08

Family

ID=30319734

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1983143209U Pending JPS6049663U (ja) 1983-09-13 1983-09-13 配線基板

Country Status (1)

Country Link
JP (1) JPS6049663U (ja)

Similar Documents

Publication Publication Date Title
JPS6057152U (ja) プリント配線板
JPS6049663U (ja) 配線基板
JPS60183439U (ja) 集積回路
JPS6052665U (ja) 配線基板
JPS6112201U (ja) 配線回路基板
JPS58120662U (ja) チツプキヤリヤ−
JPS6052656U (ja) 回路基板
JPS59129853U (ja) 粘着シ−ト
JPS59123358U (ja) プリント配線板基材
JPS5963916U (ja) フレキシブルケ−ブル
JPS6013737U (ja) 半導体集積回路装置
JPS6094836U (ja) 半導体装置
JPS5835982U (ja) 反射塗装
JPS60119769U (ja) フレキシブル回路基板
JPS60175319U (ja) 磁気ヘツド用基板
JPS6098655U (ja) サ−マルヘツド用回路板
JPS58148903U (ja) チツプ抵抗体
JPS6033439U (ja) 半導体装置
JPS60102226U (ja) 導電性粘着テ−プまたはシ−ト
JPS5933744U (ja) 接着テ−プ
JPS587338U (ja) 半導体装置用グランドチツプ
JPS6090842U (ja) Icなどチツプ押え装置
JPS58109248U (ja) 半導体素子
JPS58144991U (ja) スピ−カ
JPS61109168U (ja)