JPS60502234A - ウエハ - Google Patents

ウエハ

Info

Publication number
JPS60502234A
JPS60502234A JP60500707A JP50070785A JPS60502234A JP S60502234 A JPS60502234 A JP S60502234A JP 60500707 A JP60500707 A JP 60500707A JP 50070785 A JP50070785 A JP 50070785A JP S60502234 A JPS60502234 A JP S60502234A
Authority
JP
Japan
Prior art keywords
wafer
die
monolithic
bonding
contact
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP60500707A
Other languages
English (en)
Japanese (ja)
Inventor
ストツパー，ハーバート
パーキンス，コーネリアス・チヤーチル
Original Assignee
モザイク・システムズ・インコ−ポレ−テッド
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by モザイク・システムズ・インコ−ポレ−テッド filed Critical モザイク・システムズ・インコ−ポレ−テッド
Publication of JPS60502234A publication Critical patent/JPS60502234A/ja
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P74/00—Testing or measuring during manufacture or treatment of wafers, substrates or devices
    • H10P74/27—Structural arrangements therefor
    • H10P74/273—Interconnections for measuring or testing, e.g. probe pads
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/611—Insulating or insulated package substrates; Interposers; Redistribution layers for connecting multiple chips together
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/67—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their insulating layers or insulating parts
    • H10W70/69—Insulating materials thereof
    • H10W70/698—Semiconductor materials that are electrically insulating, e.g. undoped silicon
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/401—Package configurations characterised by multiple insulating or insulated package substrates, interposers or RDLs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/531—Shapes of wire connectors
    • H10W72/5363—Shapes of wire connectors the connected ends being wedge-shaped

Landscapes

  • Testing Or Measuring Of Semiconductors Or The Like (AREA)
  • Wire Bonding (AREA)
JP60500707A 1983-09-15 1984-09-12 ウエハ Pending JPS60502234A (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US53239183A 1983-09-15 1983-09-15
US532391 1983-09-15

Publications (1)

Publication Number Publication Date
JPS60502234A true JPS60502234A (ja) 1985-12-19

Family

ID=24121588

Family Applications (1)

Application Number Title Priority Date Filing Date
JP60500707A Pending JPS60502234A (ja) 1983-09-15 1984-09-12 ウエハ

Country Status (3)

Country Link
EP (1) EP0155965A4 (fr)
JP (1) JPS60502234A (fr)
WO (1) WO1985001390A1 (fr)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2588696B1 (fr) * 1985-10-16 1988-10-07 Thomson Csf Circuit hybride et procede de fabrication d'un tel circuit
DE4108154A1 (de) * 1991-03-14 1992-09-17 Telefunken Electronic Gmbh Elektronische baugruppe und verfahren zur herstellung von elektronischen baugruppen

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR1064185A (fr) * 1967-05-23 1954-05-11 Philips Nv Procédé de fabrication d'un système d'électrodes
US3699543A (en) * 1968-11-04 1972-10-17 Energy Conversion Devices Inc Combination film deposited switch unit and integrated circuits
US3795973A (en) * 1971-12-15 1974-03-12 Hughes Aircraft Co Multi-level large scale integrated circuit array having standard test points
US4206470A (en) * 1977-09-01 1980-06-03 Honeywell Inc. Thin film interconnect for multicolor IR/CCD
US4220917A (en) * 1978-07-31 1980-09-02 International Business Machines Corporation Test circuitry for module interconnection network
US4467400A (en) * 1981-01-16 1984-08-21 Burroughs Corporation Wafer scale integrated circuit
WO1982002640A1 (fr) * 1981-01-16 1982-08-05 Robert Royce Johnson Substrat d'interconnection universelle
US4479088A (en) * 1981-01-16 1984-10-23 Burroughs Corporation Wafer including test lead connected to ground for testing networks thereon
US4458297A (en) * 1981-01-16 1984-07-03 Mosaic Systems, Inc. Universal interconnection substrate
US4424579A (en) * 1981-02-23 1984-01-03 Burroughs Corporation Mask programmable read-only memory stacked above a semiconductor substrate

Also Published As

Publication number Publication date
WO1985001390A1 (fr) 1985-03-28
EP0155965A1 (fr) 1985-10-02
EP0155965A4 (fr) 1987-09-07

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