JPS6051263B2 - Manufacturing method of semiconductor device - Google Patents

Manufacturing method of semiconductor device

Info

Publication number
JPS6051263B2
JPS6051263B2 JP2621277A JP2621277A JPS6051263B2 JP S6051263 B2 JPS6051263 B2 JP S6051263B2 JP 2621277 A JP2621277 A JP 2621277A JP 2621277 A JP2621277 A JP 2621277A JP S6051263 B2 JPS6051263 B2 JP S6051263B2
Authority
JP
Japan
Prior art keywords
semiconductor
manufacturing
crystal layer
electrode
semiconductor device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP2621277A
Other languages
Japanese (ja)
Other versions
JPS53110470A (en
Inventor
隆一郎 山本
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Electric Co Ltd filed Critical Nippon Electric Co Ltd
Priority to JP2621277A priority Critical patent/JPS6051263B2/en
Publication of JPS53110470A publication Critical patent/JPS53110470A/en
Publication of JPS6051263B2 publication Critical patent/JPS6051263B2/en
Expired legal-status Critical Current

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  • Formation Of Insulating Films (AREA)
  • Junction Field-Effect Transistors (AREA)
  • Recrystallisation Techniques (AREA)

Description

【発明の詳細な説明】 本発明は半導体装置の製造方法に関し、さらに詳しくは
半導体結晶層上に電極を備えかつ半導体結晶層の露出部
がパツシベイトされてなる半導体装置の製造方法に関す
るものである。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method for manufacturing a semiconductor device, and more particularly to a method for manufacturing a semiconductor device in which an electrode is provided on a semiconductor crystal layer and an exposed portion of the semiconductor crystal layer is passivated.

一般に電極が平面上に配置される半導体素子ては電極間
の半導体動作層表面が露出する場合かあり、表面リーク
電流の増大や汚れの附着等の防止および信頼性の確保と
いう観点から露出半導体表面にパッシベーション膜を形
成することが行われている。
In general, in semiconductor devices in which electrodes are arranged on a flat surface, the surface of the semiconductor active layer between the electrodes may be exposed, and the exposed semiconductor surface is Forming a passivation film is being practiced.

現在行われている5102やSi。N4を堆積させる方
法があり、さらに半導体を陽極酸化することにより得ら
れる酸化膜をパッシベーション膜に利用する方法が考え
られる。この方法は従来の方法と異なり、動作層として
機能している化合物半導体の表面そのものを酸化して膜
を形成するため、膜用として新たな材料を必要とせず簡
単な装置で行える利点があるが半導体表面上に配置して
ある電極を通して電流が流れ電極下領域も酸化されてし
まい半導体装置か設計構造と異なつた構造になつてしま
う等の欠点があり実用に供し得なかつた。
5102 and Si currently in use. There is a method of depositing N4, and a method of using an oxide film obtained by anodic oxidation of a semiconductor as a passivation film is also considered. Unlike conventional methods, this method forms a film by oxidizing the surface of the compound semiconductor that functions as the active layer, so it has the advantage that it does not require new materials for the film and can be performed using simple equipment. This method could not be put to practical use because current flows through the electrodes placed on the surface of the semiconductor, and the area under the electrodes is also oxidized, resulting in the semiconductor device having a structure different from the designed structure.

本発明は前記従来の欠点を除去せしめた半導体装置の製
造方法を提供することにある。
SUMMARY OF THE INVENTION An object of the present invention is to provide a method for manufacturing a semiconductor device that eliminates the above-mentioned conventional drawbacks.

本発明によれば、半導体結晶層上に電極を備えかつ前記
半導体結晶層の露出部がパツシベイトされてなる半導体
装置の製造において前記電極が設けられる半導体結晶層
部をプロトン照射によつて半絶縁性化せしめた後該半絶
縁性化せしめた表面部に電極を形成し、露出せる半導体
結晶層表面部を陽極酸化法によつて酸化膜層に変換せし
めた後、熱処理を施こす工程を含むことを特徴とする半
導体装置の製造方法が得られる。
According to the present invention, in manufacturing a semiconductor device in which an electrode is provided on a semiconductor crystal layer and an exposed portion of the semiconductor crystal layer is passivated, the semiconductor crystal layer portion on which the electrode is provided is made semi-insulating by proton irradiation. forming an electrode on the semi-insulating surface portion, converting the exposed surface portion of the semiconductor crystal layer into an oxide film layer by an anodizing method, and then performing heat treatment. A method for manufacturing a semiconductor device is obtained.

前記本発明によれば、パッシベーション膜用の材料を新
たに用意することなく密着性の良好なパッシベーション
膜を形成することができ、しかも従来のように電極下ま
でパッシベーション膜がでフきるようなことはなく設計
通りの構造の半導体装置を容易に製作することができる
According to the present invention, it is possible to form a passivation film with good adhesion without preparing a new material for the passivation film, and moreover, the passivation film can be formed all the way to the bottom of the electrode, unlike conventional methods. Therefore, it is possible to easily manufacture a semiconductor device having a structure as designed.

次に本発明についてショットキー障壁型GaAs電界効
果トランジスタの製造方法に適用した場合を一例として
図面を用いて説明する。
Next, the present invention will be described with reference to the drawings, taking as an example a case where the present invention is applied to a method of manufacturing a Schottky barrier type GaAs field effect transistor.

第1図から5第5図は本発明の一実施例を説明するため
の図で各主要工程における半導体装置の断面を示す。ま
す、半絶縁性基板1上にエピタキシャル成長したGaA
s薄層2を矩形状の複数個のフォトレジスト膜3で覆い
エッチングすることによりメサ状の複数個のGaAs動
作層群を得る(第1図)。次にフォトレジスト膜3を除
去したのち、新たにフォトレジスト膜4を塗布してパタ
ーンを切り該フォトレジスト膜をマスクにプロトン照射
を行い半絶縁性領域5を得る(第2図)。次にAl金属
を蒸着しリフトオフしてゲート電極6を得た後再びフォ
トレジスト膜7を塗布してパターンを切り、該フォトレ
ジスト膜をマスクにプロトン照射を行い半絶縁性領域8
を得る(第3図)。次にオーミック金属を蒸着してリフ
トオフを行いオーミック用電極9,10を得る(第4図
)。次にウェハーの、パツシベイシヨン膜を形成する方
の面に光を照射しながら陽極酸化を行うと、電極下は半
絶縁性領域になつているため電極を通しては陽極酸化液
と電流が流れることはなく酸化膜形成のストッパーとし
て作用するために希望する半導体表面にだけ酸化膜11
が形成される(第5図)。次に熱処理を行うことにより
電極9,10を電気的にオーミックにする。この時この
熱処理によリブ2口トン照射により形成された半絶縁性
領域5,8は従来の電気的特性を示す半導体結晶層にも
どる。最後にダイヤモンドスクライバー等で各素子を切
断分離する(第6図)。
1 to 5 are diagrams for explaining one embodiment of the present invention, and show cross sections of a semiconductor device at each main step. First, GaA epitaxially grown on a semi-insulating substrate 1.
By covering the S thin layer 2 with a plurality of rectangular photoresist films 3 and etching them, a plurality of mesa-shaped GaAs active layer groups are obtained (FIG. 1). Next, after removing the photoresist film 3, a new photoresist film 4 is applied, a pattern is cut, and proton irradiation is performed using the photoresist film as a mask to obtain a semi-insulating region 5 (FIG. 2). Next, Al metal is deposited and lifted off to obtain the gate electrode 6, and then a photoresist film 7 is applied again and a pattern is cut, and proton irradiation is performed using the photoresist film as a mask to form a semi-insulating region 8.
(Figure 3). Next, ohmic metal is deposited and lift-off is performed to obtain ohmic electrodes 9 and 10 (FIG. 4). Next, when anodic oxidation is performed while irradiating light onto the side of the wafer on which the passivation film will be formed, the area under the electrode is a semi-insulating region, so no anodic oxide solution or current flows through the electrode. Oxide film 11 is formed only on the desired semiconductor surface to act as a stopper for oxide film formation.
is formed (Figure 5). Next, heat treatment is performed to make the electrodes 9 and 10 electrically ohmic. At this time, by this heat treatment, the semi-insulating regions 5 and 8 formed by the two-ton rib irradiation return to semiconductor crystal layers exhibiting conventional electrical characteristics. Finally, each element is cut and separated using a diamond scriber or the like (FIG. 6).

このように本発明によれば半導体結晶層上に電極を備え
かつ半導体結晶層の露出部がパツシベイトされてなる半
導体装置を精度よくかつ容易に製作することができる。
As described above, according to the present invention, it is possible to accurately and easily manufacture a semiconductor device in which an electrode is provided on a semiconductor crystal layer and the exposed portion of the semiconductor crystal layer is passivated.

尚、前記本発明は半導体材料としてGaAs等の化合物
半導体だけでなくSi..Ge等の単一半導体であつて
もよいことは云うまでもない。
Note that the present invention uses not only compound semiconductors such as GaAs but also Si. .. Needless to say, a single semiconductor such as Ge may be used.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図〜第6図は本発明の一実施例として、ショットキ
ー障壁型電界効果トランジスタの製造に適応した場合を
説明するための図で、各主要工程における断面を示す。
FIGS. 1 to 6 are diagrams for explaining a case where the present invention is applied to manufacturing a Schottky barrier field effect transistor as an embodiment of the present invention, and show cross sections in each main process.

Claims (1)

【特許請求の範囲】[Claims] 1 半導体結晶層上に電極を備えかつ前記半導体結晶層
の露出部がパツシベイトされてなる半導体装置の製造に
おいて前記電極が設けられる半導体結晶層部をプロトン
照射によつて半絶縁性化せしめた後該半絶縁性化せしめ
た表面部に電極を形成し、露出せる半導体結晶層表面部
を陽極酸化法によつて酸化膜層に変換せしめた後、熱処
理を施こす工程を含むことを特徴とする半導体装置の製
造方法。
1. In manufacturing a semiconductor device in which an electrode is provided on a semiconductor crystal layer and an exposed portion of the semiconductor crystal layer is passivated, the semiconductor crystal layer portion on which the electrode is provided is rendered semi-insulating by proton irradiation, and then A semiconductor characterized by comprising a step of forming an electrode on a semi-insulating surface, converting the exposed surface of the semiconductor crystal layer into an oxide film layer by anodizing, and then subjecting it to heat treatment. Method of manufacturing the device.
JP2621277A 1977-03-09 1977-03-09 Manufacturing method of semiconductor device Expired JPS6051263B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2621277A JPS6051263B2 (en) 1977-03-09 1977-03-09 Manufacturing method of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2621277A JPS6051263B2 (en) 1977-03-09 1977-03-09 Manufacturing method of semiconductor device

Publications (2)

Publication Number Publication Date
JPS53110470A JPS53110470A (en) 1978-09-27
JPS6051263B2 true JPS6051263B2 (en) 1985-11-13

Family

ID=12187118

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2621277A Expired JPS6051263B2 (en) 1977-03-09 1977-03-09 Manufacturing method of semiconductor device

Country Status (1)

Country Link
JP (1) JPS6051263B2 (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59195822A (en) * 1983-04-20 1984-11-07 Sanyo Electric Co Ltd Formation of impurity region
JPS60145675A (en) * 1984-01-09 1985-08-01 Mitsubishi Electric Corp Gaas fet

Also Published As

Publication number Publication date
JPS53110470A (en) 1978-09-27

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