JPS6076090A - Sense amplifier circuit - Google Patents

Abstract

PURPOSE:To ensure the stable and high-speed actuation of a sense amplifier circuit by separating are amplifying function into a primary and secondary amplifications and starting the secondary amplification by a transistor which is controlled with the reception of the output of the primary amplification. CONSTITUTION:A different potential is produced between the levels of nodes N11 and N12 after activation of phi1. For nodes N13 and N14, the level of the N13 starts a rise when the N11 has a change between high and low levels. Then a transistor (TR)Q18 is turned on and increases the amplification degree by a TRQ15 and a TRQ16. The level of the N13 rises high to increase the amplification degree. Finally the level of the N11 is changed completely to a low level to end the amplification of the N11. In such a way, both TRQ15 and TRQ16 are actuated after separating the 1st amplification of a TRQ13 and a TRQ14 from the 2nd amplification of the TRQ15 and TRQ16 and the amplification levels of the TRQ13 and TRQ14 are fed back. This secures the stable and high-speed actuation of the sense amplifier circuit.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to semiconductor devices, and particularly to electronic circuits constructed using insulated gate field effect transistors.

In the following, a representative MOS (Metal Jhide 5ili
(hereinafter referred to as MO8T) and an N-channel MO8T will be described, but the present invention is not limited to this, and the present invention is not limited to this.
The same applies to O8T.

MOB memory circuits (hereinafter referred to as RAM) are suitable for increasing capacity and are currently the mainstream medium conductor memory.
Among them, one-transistor type dynamic RAM is mainly used because its cell area is small. In this one-transistor type dynamic RAM, a balanced dynamic clip-flop type sense amplifier circuit is most often used to achieve the purpose of speeding up and amplifying small signals. There is. This sense amplifier circuit is required to be high-speed and have a wide operating margin due to the current demand for high-speed dynamic AM.

A conventionally used sense amplifier circuit 'jjR1 is shown in FIG. In FIG. 1, when WL and DWL rise to a high level and TG becomes a high level and is activated, the signal of the memory cell MC and the signal of the dummy cell DC are transferred to the line DLK.
Hail, φ1 is activated and the potential difference is amplified at the node NI N2. This amplification activates φ2, expands the amplification of the sense amplifier, and amplifies the sense amplifier.

At this time, φ2 is raised after a suitable interval after φ1 has risen, but the timing of this rise must be determined in advance.However, φ2 is the node NI
If you do not set it to a high level after a sufficient voltage difference has occurred in N2,
The amplification may occur without exhibiting the correct amplification function.A stable and high-speed sense amplifier can be achieved by arbitrarily increasing the timing of increasing φ2 to an optimum time.

The present invention seeks to provide a sense amplifier circuit that meets the above objectives.

FIG. 2 shows an embodiment of the present invention.

In Fig. 2, in order to increase the amplification sensitivity of the sense amplifier, a two-stage amplifier circuit is constructed, and the amplification start period is set so that the second amplification is automatically opened after the start of the first amplification. - is set to feed back the amplification level to obtain a stable amplification start time.

In FIG. 2, after activation of φ1, the node level of Nil N12 produces a difference potential, and the node N13 N141dN11
changes from high to low, the N13 level begins to rise, transistor Q18 turns on, and transistors Q15 . Q16 expands the amplification degree, and K further increases the level of node N13 to expand the amplification degree,
Finally, the level of node Nil is moved to a completely low level to complete its amplification. When the node N12 changes to a low level, the opposite operation is performed, changing the level of the node N14 to a high level, turning on the transistor Q19, and turning on the transistor Q15. This increases the amplification degree of Q16. In this way, transistor Q13
1Q14 first amplification and transistor Q15. Q16
and the second amplification of transistor Q13.
．． Stable and high-speed sense amplifier operation is achieved by feedback of the amplification level by Q14 and by operating transistors Q15 and Q16.

FIG. 3 shows another embodiment of the invention.

In FIG. 3, the basic operation is the same as that in FIG. 2, but the first sense amplifier amplification starting transistor Q58 is φ
In response to the lowered level of N53, the level of N54 rises, and the transistor Q
59 is turned on to start second amplification, and after the start of two-stage separation amplification and one-stage amplification, transistor Q59 is automatically activated. According to the present invention, in addition to the conventional one-stage amplification function, it has a two-stage amplification function, and has a highly advanced amplification function. Since the start time of the second stage amplification is automatically set by the barrier of the first stage amplification, it is possible to realize a sense amplifier circuit with high speed and a wide operating margin. Become·

[Brief explanation of the drawing]

Figure 1 shows a conventionally used one-transistor D.
FIG. 2 is a circuit diagram showing an embodiment of the present invention, and FIG. 3 is a circuit diagram showing another embodiment of the sense amplifier used in the RAM. qttQz...Transistor, C1, C2...
...Capacitor Figure 3

Claims (1)

[Claims] In a memory sense amplifier circuit composed of insulated gate field effect transistors, the amplification function is separated into primary amplification and secondary amplification, and the secondary amplification is performed by the primary amplification.
Flip-flop type sense amplifier circuit characterized by being started by a transistor controlled by receiving the output of the next amplification @