JPS61102006A - surge absorber - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a surge absorber that protects electronic equipment from various surge voltages such as lightning.

Conventional configurations and their problems In recent years, as electronic equipment has become more multifunctional, many ICs and LS
Semiconductors such as I are used.

Although these semiconductors have excellent functionality, they are extremely sensitive to surge voltages generated by lightning or when inductive loads are switched on and off, often resulting in malfunction, destruction, or failure. To protect semiconductors from such harmful surge voltages, ceramic varistors whose main components are zinc oxide, strontium titanate, etc. are widely used. These varistors are effective when used alone, but in order to further improve their surge suppression effects, they are increasingly being combined with impedance elements such as resistors and inductances to form composite surge absorbers. .

Such a conventional surge absorber will be explained using FIG. 4. Figure 4 is a circuit diagram of a conventional surge absorber connected to an atomic bomb device, where 1 is the protected device, 2.3 is the signal line of the protected device 1, and 4 is the signal line [12, 3 side] A first varistor connected between the lines, 5 a second varistor similarly connected between the lines on the protected equipment 1 side, and 6 a signal between the first varistor 4 and the second varistor 5. A resistor 7 as an example of an impedance element connected in series with the line 2 is a surge absorber configured in a π-shape with the 2filJ varistors 4 and 5 and one resistor 6.

First, surge voltage such as lightning occurs between the signal lines 2 and 3, but most of the surge energy is absorbed by the first varistor 4 located in the first stage, resulting in a somewhat lower voltage. is suppressed. Furthermore, this suppressed voltage is further suppressed to a lower voltage by the resistor 6 and the second varistor 5, and becomes a sufficiently low voltage for the protected device 1. Traditionally, these composite surge absorbers have been formed by a combination of individual discrete components. For example, the first and second varistors 4 and 5 are zinc oxide varistors, each of a radial lead type with two lead wires, and the resistor 6 is a carbon film resistor with the required power rating. Axial lead types such as , metal film resistors, and solid resistors were mounted individually on printed circuit boards. However, with this configuration method, it is difficult to downsize and lighten the structure, the number of man-hours required for assembly is still high, and there are problems from an economical perspective.Therefore, a surge absorber that is small and has similar characteristics is desired. was.

OBJECTS OF THE INVENTION The present invention solves the above-mentioned conventional drawbacks, and aims to provide a surge absorber that has characteristics equivalent to the conventional ones, is smaller and lighter, and can reduce the number of assembly steps.

Structure of the Invention In order to achieve the above object, the surge absorber of the present invention includes a plate-shaped varistor substrate, and a plurality of varistor substrates formed on both sides of the varistor substrate so as to face each other with the varistor substrate sandwiched therebetween. The divided electrodes, an impedance element such as a resistor or an inductor formed on the varistor substrate and between the divided electrodes, and an electrode formed on the varistor substrate and serving as a terminal among the electrodes are connected to the varistor. The varistor board is configured to include printed wiring drawn out to the edge of the board, and metal external terminals that sandwich the varistor board between these printed wiring parts.

According to this configuration, a plurality of varistors and a plurality of impedance elements are formed on one varistor board, and it becomes possible to replace a conventional discrete composite surge absorber.

DESCRIPTION OF EMBODIMENTS Hereinafter, embodiments of the present invention will be described based on the drawings.

FIG. 1 shows the configuration of a surge absorber according to a first embodiment of the present invention, in which A is a back view, B is a top view, and C is a side view. In FIG. 1, 8 is a plate-shaped varistor substrate, 9 is an electrode formed on the back surface of the varistor substrate 8 by silver baking, etc., and 10 and 11 are electrodes similarly formed on the surface of the varistor substrate 8. Electrode 10.11 is electrode 9
The varistor substrate 8 is located at a position opposite to the varistor substrate 8. Further, the electrode 10 is set wider than the electrode 11 in order to absorb a large amount of energy in the application. 12.13.14 is a printed wiring extending from the terminal electrode 9.10.11 to the edge of the varistor board 8, and the electrode 9.10.1
When forming electrodes 9, 10, and 11, they are simultaneously formed of the same material as electrodes 9, 10, and 11 by a screen printing method or the like. Metal external terminals 15, 16, and 17 are connected to the edges of the printed wiring 12, 13, and 14, and are fixed with the varistor board 8 sandwiched therebetween, and are electrically connected to each other by high-temperature solder or the like. A resistor 18 connects the electrodes 10 and 11, and is a glaze resistor formed on the surface of the varistor substrate 8 by baking. This glaze resistor is suitable for mass production and has the feature of maintaining the flatness of the substrate. When the surge absorber configured in this way is mounted, the external terminals 15, 16
．． All but 17 are coated with epoxy resin or the like.

Three external terminals configured as above 15.16°1
7 will have a similar configuration to the conventional surge absorber circuit shown in FIG. That is, the first varistor 4 is formed between electrodes 9, 10, the resistor 6 is a resistor 18, and the second varistor 5 is formed between electrodes 9, 10.
Each is formed between 1 and 2.

The external terminal 16 is connected to the signal line 1m2 line side, the signal line 17 is connected to the protected device 1 side of the signal line 2, and the external terminal 15 is connected to the signal line 3.

In this way, according to this embodiment, it is possible to configure two varistors and one resistor with a single plate-shaped varistor board 8, resulting in a small size, light weight, space saving, and reduction in assembly man-hours. can be realized.

Next, a second embodiment of the present invention will be described based on FIGS. 2 and 3. FIG. 3 is a circuit diagram of a second embodiment of the present invention in which a surge absorber is connected to a protected device, and is a symmetrical version of the circuit configuration shown in FIG. 4. 4
a, 4b and 5a.

5b is a varistor on the side of the signal lines 2 and 3, and a varistor on the side of the protected device 1, each having one end in common. 19 is a ground terminal, and the four varistors 4a.

This serves as a common side terminal for 4b, 5a, and 5b.

5a and 5b are resistors. Note that other symbols are the same as in FIG. 4.

FIG. 3 shows a surge absorber according to a second embodiment of the present invention, which basically consists of two circuits of the structure of the first embodiment on one varistor board. In FIG. 3, A is a back view, B is a plan view, and C is a side view. In FIG. 3, reference numeral 9a indicates an electrode 10a provided on the back surface of the plate-shaped varistor substrate 8.

11a, 10b, 11b are electrodes formed on the surface of the varistor substrate 8, and these electrodes 10a, 11
a, 10b.

11b faces the electrode 9a with the varistor substrate 8 in between. 12a, 13a, 13b, 14a
, 14b are electrodes 9a, 10a, 1, respectively.
Printed wiring stretched from 1a, 10b, 11b to the edge of the varistor board 8, 20.16b,
17b, 16a, 17a are printed wiring 9a
, 10a, Ila, 10b, 11b, and 18a, 18b are glaze resistors. Varistor 4a has electrodes 9a and 10a
In between, varistor 5a is between electrodes 9a and 11a, varistor 4b is between electrodes 9a and 10b, and varistor 5b is between electrode 9a.

11b and IIJ, respectively. Also, the resistor 6a
is formed by the resistor 18a, and the resistor 6b is formed by the resistor 18b. The external terminals 16b and 16a are each connected to the line side of the signal line 2.3, and the external terminal 16b.

16a is connected to the protected device 1 side of the signal lines 2 and 3. Further, the external terminal 20 is connected to the ground terminal 19.

In this way, according to the present embodiment, it is possible to configure four varistors and two resistors with one varistor board 8, resulting in smaller size, lighter weight, space saving, and reduced assembly man-hours.
This can be realized more effectively than the first embodiment.

Note that it is also possible to configure more circuits or circuits different from those in the embodiments on the varistor substrate. For example, chip resistors are used as the resistors 18.18a and 18b. The operation is similar to the first and second embodiments. By using a chip resistor in this way, the resistance value can be easily changed depending on the application, and there is no need for high-temperature baking treatment like resistor baking, which reduces the effect on the characteristics of the varistor board 8. has. Further, as a chip resistor, not only one having linear characteristics but also a semiconductor resistor such as a fuse resistor or a positive temperature coefficient thermistor chip resistor can be easily connected.

Another example is to use chip inductors as impedance elements instead of the resistors 1g, 18a, and 18b. Normally, surge voltage includes high frequency components on the order of several tens of kilohertz (KHz) to one kilometer (MH2), but inductors exhibit better surge voltage attenuation characteristics than resistors for these frequency components. . By using this chip inductor as an impedance element, it is easy to change the inductance value depending on the application, the surge voltage attenuation characteristics are better than that of a resistor, and the effects of seizure can be avoided over time.

In the above embodiment, the external terminals are gathered on one side, but it goes without saying that the same effect as above can be obtained by dispersing them in other parts of the varistor board 8.

As described in detail, according to the present invention, it is possible to realize miniaturization, light weight, and space saving, and at the same time, since a composite circuit is formed with a single component, the number of assembly steps can be reduced. Further, by using a baked-in resistor as an impedance element, it is possible to construct a substrate with a flat surface that is highly suitable for mass production. Furthermore, by using a chip resistor as an impedance element, it is possible to easily control the resistance value and to diversify the types and functions of the resistor. Further, by using a chip inductor as an impedance element, excellent surge suppression characteristics can be obtained, and at the same time, the inductance value can be easily controlled.

[Brief explanation of the drawing]

1A is a back view of the surge absorber according to the first embodiment of the present invention, FIG. 1B is a top view, FIG. 1C is a side view, and FIG.
The figure is a circuit diagram of a surge absorber connected to a protected device according to the second embodiment of the present invention, Figure 3A is a rear view of the surge absorber, Figure B is a top view, and Figure C is the same side view,
Figure 4 shows a conventional surge absorber under test 21! It is a circuit diagram of the state connected to m device. , 8... Varistor board, 9.9a, 10.10a
, 10b. 11, 11a, l1b-・-electrode, 12.12a
, 13.13a, 13b, 14.14a,
1ab--Printed wiring, 15.16.16a,
16b, 17.17a, 17b, 20-
・・External terminal, 18° 18a, 18b --・Resistance agent Yoshihiro Morimoto Figure 1 Figure 2 Figure 3

Claims (1)

[Scope of Claims] 1. A plate-shaped varistor substrate, electrodes formed on both sides of the varistor substrate so as to face each other with the varistor substrate sandwiched therebetween, and at least one of which is divided into a plurality of parts; and an impedance element formed between the divided electrodes, a printed wiring formed on the varistor substrate and leading out a terminal electrode among the electrodes to an edge of the varistor substrate, and these printed wiring parts. A surge absorber comprising metal external terminals that sandwich the varistor board. 2. The surge absorber according to claim 1, wherein the impedance element is a resistor formed by baking on the varistor substrate. 3. The surge absorber according to claim 1, wherein the impedance element is a chip resistor. 4. The surge absorber according to claim 1, wherein the impedance element is an inductor. 5. The surge absorber according to claim 4, wherein the inductor is a chip inductor.