JPS6112142A - シグナリングフレ−ムフオ−マツト変換回路 - Google Patents

シグナリングフレ−ムフオ−マツト変換回路

Info

Publication number
JPS6112142A
JPS6112142A JP13094984A JP13094984A JPS6112142A JP S6112142 A JPS6112142 A JP S6112142A JP 13094984 A JP13094984 A JP 13094984A JP 13094984 A JP13094984 A JP 13094984A JP S6112142 A JPS6112142 A JP S6112142A
Authority
JP
Japan
Prior art keywords
signaling
frame
time slot
counter
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP13094984A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0326933B2 (2
Inventor
Hideyuki Nakai
中井　秀行
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Oki Electric Industry Co Ltd
Original Assignee
Oki Electric Industry Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Oki Electric Industry Co Ltd filed Critical Oki Electric Industry Co Ltd
Priority to JP13094984A priority Critical patent/JPS6112142A/ja
Publication of JPS6112142A publication Critical patent/JPS6112142A/ja
Publication of JPH0326933B2 publication Critical patent/JPH0326933B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04J—MULTIPLEX COMMUNICATION
    • H04J3/00—Time-division multiplex systems
    • H04J3/02—Details
    • H04J3/12—Arrangements providing for calling or supervisory signals

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Time-Division Multiplex Systems (AREA)
JP13094984A 1984-06-27 1984-06-27 シグナリングフレ−ムフオ−マツト変換回路 Granted JPS6112142A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13094984A JPS6112142A (ja) 1984-06-27 1984-06-27 シグナリングフレ−ムフオ−マツト変換回路

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13094984A JPS6112142A (ja) 1984-06-27 1984-06-27 シグナリングフレ−ムフオ−マツト変換回路

Publications (2)

Publication Number Publication Date
JPS6112142A true JPS6112142A (ja) 1986-01-20
JPH0326933B2 JPH0326933B2 (2) 1991-04-12

Family

ID=15046420

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13094984A Granted JPS6112142A (ja) 1984-06-27 1984-06-27 シグナリングフレ−ムフオ−マツト変換回路

Country Status (1)

Country Link
JP (1) JPS6112142A (2)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4787084A (en) * 1987-02-26 1988-11-22 Amdahl Corporation Frame code converter
JPH01276840A (ja) * 1988-04-28 1989-11-07 Fujitsu Ltd 多重化方式

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4787084A (en) * 1987-02-26 1988-11-22 Amdahl Corporation Frame code converter
JPH01276840A (ja) * 1988-04-28 1989-11-07 Fujitsu Ltd 多重化方式

Also Published As

Publication number Publication date
JPH0326933B2 (2) 1991-04-12

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