JPS6115278A - 画素間演算回路 - Google Patents
画素間演算回路Info
- Publication number
- JPS6115278A JPS6115278A JP59135912A JP13591284A JPS6115278A JP S6115278 A JPS6115278 A JP S6115278A JP 59135912 A JP59135912 A JP 59135912A JP 13591284 A JP13591284 A JP 13591284A JP S6115278 A JPS6115278 A JP S6115278A
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- data
- clamp
- alu
- bit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
- G06T1/00—General purpose image data processing
- G06T1/0007—Image acquisition
Landscapes
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Image Processing (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP59135912A JPS6115278A (ja) | 1984-06-30 | 1984-06-30 | 画素間演算回路 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP59135912A JPS6115278A (ja) | 1984-06-30 | 1984-06-30 | 画素間演算回路 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS6115278A true JPS6115278A (ja) | 1986-01-23 |
| JPH029386B2 JPH029386B2 (2) | 1990-03-01 |
Family
ID=15162741
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP59135912A Granted JPS6115278A (ja) | 1984-06-30 | 1984-06-30 | 画素間演算回路 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6115278A (2) |
-
1984
- 1984-06-30 JP JP59135912A patent/JPS6115278A/ja active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPH029386B2 (2) | 1990-03-01 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US4953115A (en) | Absolute value calculating circuit having a single adder | |
| KR100348951B1 (ko) | 조건부레지스터쌍으로부터의메모리저장 | |
| US4807172A (en) | Variable shift-count bidirectional shift control circuit | |
| KR100348952B1 (ko) | 데이타처리장치 | |
| JPS6398729A (ja) | バレルシフタ | |
| KR19980057038A (ko) | 칼라 필터 어레이 및 그 신호 처리 회로 | |
| US5715186A (en) | Digital processing device with minimum and maximum search instructions | |
| JPH0426731B2 (2) | ||
| JPH0421025A (ja) | 左右シフタ | |
| US6877019B2 (en) | Barrel shifter | |
| JPS6115278A (ja) | 画素間演算回路 | |
| US6629239B1 (en) | System and method for unpacking and merging bits of a data world in accordance with bits of a mask word | |
| US4206458A (en) | Numerical display system for electronic instrument | |
| US5708800A (en) | High speed microprocessor for processing and transferring N-bits of M-bit data | |
| JPS6341271B2 (2) | ||
| KR100241071B1 (ko) | 합과 합+1을 병렬로 생성하는 가산기 | |
| JPS60175142A (ja) | デイジタル演算回路 | |
| JP2614496B2 (ja) | 大小比較回路 | |
| SU1244660A1 (ru) | Арифметическо-логическое устройство дл обработки дес тичных данных | |
| JPS6116329A (ja) | キヤリ先見演算器 | |
| JPH0517574B2 (2) | ||
| JPS6341273B2 (2) | ||
| JPS62171027A (ja) | デイジタル信号処理装置 | |
| JPS63168724A (ja) | 丸め回路のステイツキ−信号発生回路 | |
| JPS60167027A (ja) | デイジタル信号処理用演算回路 |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| LAPS | Cancellation because of no payment of annual fees |