JPS6119164B2 - - Google Patents

Info

Publication number
JPS6119164B2
JPS6119164B2 JP54165973A JP16597379A JPS6119164B2 JP S6119164 B2 JPS6119164 B2 JP S6119164B2 JP 54165973 A JP54165973 A JP 54165973A JP 16597379 A JP16597379 A JP 16597379A JP S6119164 B2 JPS6119164 B2 JP S6119164B2
Authority
JP
Japan
Prior art keywords
base
transistor
oscillation
circuit
power supply
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP54165973A
Other languages
Japanese (ja)
Other versions
JPS5689102A (en
Inventor
Atsushi Ogawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tokyo Shibaura Electric Co Ltd filed Critical Tokyo Shibaura Electric Co Ltd
Priority to JP16597379A priority Critical patent/JPS5689102A/en
Priority to US06/212,745 priority patent/US4386327A/en
Priority to GB8039285A priority patent/GB2066607B/en
Priority to DE3047299A priority patent/DE3047299C2/en
Publication of JPS5689102A publication Critical patent/JPS5689102A/en
Publication of JPS6119164B2 publication Critical patent/JPS6119164B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03BGENERATION OF OSCILLATIONS, DIRECTLY OR BY FREQUENCY-CHANGING, BY CIRCUITS EMPLOYING ACTIVE ELEMENTS WHICH OPERATE IN A NON-SWITCHING MANNER; GENERATION OF NOISE BY SUCH CIRCUITS
    • H03B5/00Generation of oscillations using amplifier with regenerative feedback from output to input
    • H03B5/08Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element comprising lumped inductance and capacitance
    • H03B5/12Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element comprising lumped inductance and capacitance active element in amplifier being semiconductor device
    • H03B5/1203Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element comprising lumped inductance and capacitance active element in amplifier being semiconductor device the amplifier being a single transistor
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03BGENERATION OF OSCILLATIONS, DIRECTLY OR BY FREQUENCY-CHANGING, BY CIRCUITS EMPLOYING ACTIVE ELEMENTS WHICH OPERATE IN A NON-SWITCHING MANNER; GENERATION OF NOISE BY SUCH CIRCUITS
    • H03B5/00Generation of oscillations using amplifier with regenerative feedback from output to input
    • H03B5/08Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element comprising lumped inductance and capacitance
    • H03B5/12Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element comprising lumped inductance and capacitance active element in amplifier being semiconductor device
    • H03B5/1231Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element comprising lumped inductance and capacitance active element in amplifier being semiconductor device the amplifier comprising one or more bipolar transistors
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03BGENERATION OF OSCILLATIONS, DIRECTLY OR BY FREQUENCY-CHANGING, BY CIRCUITS EMPLOYING ACTIVE ELEMENTS WHICH OPERATE IN A NON-SWITCHING MANNER; GENERATION OF NOISE BY SUCH CIRCUITS
    • H03B2200/00Indexing scheme relating to details of oscillators covered by H03B
    • H03B2200/0002Types of oscillators
    • H03B2200/0006Clapp oscillator
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03BGENERATION OF OSCILLATIONS, DIRECTLY OR BY FREQUENCY-CHANGING, BY CIRCUITS EMPLOYING ACTIVE ELEMENTS WHICH OPERATE IN A NON-SWITCHING MANNER; GENERATION OF NOISE BY SUCH CIRCUITS
    • H03B2200/00Indexing scheme relating to details of oscillators covered by H03B
    • H03B2200/0002Types of oscillators
    • H03B2200/0008Colpitts oscillator

Landscapes

  • Inductance-Capacitance Distribution Constants And Capacitance-Resistance Oscillators (AREA)

Description

【発明の詳細な説明】 この発明は例えばチユーナの局部発振回路とし
て利用され、特にIC化に適するように改良した
発振回路に関する。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an oscillation circuit that is used as a local oscillation circuit in a tuner, for example, and is particularly adapted to be integrated into an IC.

従来、チユーナのフロントエンド等における局
部発振回路として、第1図に示すように発振用ト
ランジスタQ1といわゆるC分割用のコンデンサ
C1,C2、抵抗R1ならびにタンク回路T等を用い
たいわゆるクラツプ形の発振回路がよく使用され
ている。
Conventionally, as a local oscillation circuit in the front end of a tuner, etc., an oscillation transistor Q1 and a so-called C-dividing capacitor were used as shown in Figure 1.
A so-called clap-type oscillation circuit using C 1 , C 2 , resistor R 1 , tank circuit T, etc. is often used.

ところで、このような発振回路をIC化する場
合、タンク回路T等を外部接続用としてIC化す
ることになるが、チツプ面積を可及的に節約する
ためには分割コンデンサC1,C2として接合容量
を用いることが望ましい。この場合、接合容量と
しては、一般にトランジスタのベース−エミツタ
間容量やベース−コレクタ間容量が用いられてい
る。
By the way, when implementing such an oscillation circuit into an IC, the tank circuit T, etc. will be implemented as an IC for external connection, but in order to save the chip area as much as possible, it is necessary to use split capacitors C 1 and C 2 as separate capacitors. It is desirable to use junction capacitance. In this case, the base-emitter capacitance or base-collector capacitance of a transistor is generally used as the junction capacitance.

第2図は、このようにしてIC化される第1図
の発振回路のうちトランジスタQ1部、分割コン
デンサC1,C2部の実装構造を示している。
FIG. 2 shows the mounting structure of the transistor Q 1 section and the divided capacitors C 1 and C 2 sections of the oscillation circuit of FIG. 1 which is integrated into an IC in this manner.

しかしながら、かかるIC化構造では分割コン
デンサC1,C2をそれぞれ独立して形成する必要
があるのでチツプ面積の点で不利であると共に、
コンデンサC2部のN形領域とP形基板との間に
付随的に形成される(寄生的な)接合容量によつ
て発振作用が妨げられるという問題があつた。
However, in such an IC structure, it is necessary to form the divided capacitors C 1 and C 2 independently, which is disadvantageous in terms of chip area.
There was a problem in that the oscillation effect was hindered by the (parasitic) junction capacitance incidentally formed between the N-type region of the capacitor C2 portion and the P-type substrate.

第3図は、以上のようにしてIC化を図つた発
振回路全体の等価回路を示すもので、分割コンデ
ンサC1,C2部はそれぞれベース−コレクタ間容
量が用いられている。この場合、コンデンサ
C1,C2部に形成される上述した如き寄生容量
C1′,C2′が問題となるものである。
FIG. 3 shows an equivalent circuit of the entire oscillation circuit implemented as an IC as described above, and the base-collector capacitance is used for the dividing capacitors C 1 and C 2 . In this case, the capacitor
Parasitic capacitance as described above formed in C1 and C2 parts
C 1 ′ and C 2 ′ are problematic.

そこで、この発明は以上のような点に鑑みてな
されたもので、IC化した場合にチツプ面積を可
及的に少なくし得ると共に寄生容量による発振作
用の妨げが生じないようにし得る極めて良好な発
振回路を提供することを目的としている。
Therefore, this invention was made in view of the above points, and it is an extremely good method that can reduce the chip area as much as possible when integrated into an IC, and also prevent the oscillation from being hindered by parasitic capacitance. The purpose is to provide an oscillation circuit.

以下図面を参照してこの発明の一実施例につき
詳細に説明する。
An embodiment of the present invention will be described in detail below with reference to the drawings.

すなわち、第4図に示すようにトランジスタ
Q11は、コレクタが電源端子Vccに接続され、エ
ミツタが出力端OUTに接続されると共に抵抗R11
を介して接地等の基準電位点に接続され、ベース
が抵抗R12を介してバイアス電圧端子VBに接続さ
れる。また、マルチエミツタ形の等価コンデンサ
用トランジスタQ12はベース−コレクタ間がコン
デンサC11を形成し且つベース−エミツタ間がコ
ンデンサC12を形成するもので、ベースおよびエ
ミツタがそれぞれ前記トランジスタQ11のエミツ
タおよびベースに対応して接続され、コレクタが
電源端子Vccに接続される。
In other words, as shown in FIG.
The collector of Q11 is connected to the power supply terminal Vcc, the emitter is connected to the output terminal OUT, and the resistor R11
The base is connected to the bias voltage terminal VB via a resistor R12 . Further, the multi-emitter type equivalent capacitor transistor Q12 has a capacitor C11 between the base and the collector, and a capacitor C12 between the base and the emitter, and the base and emitter are the emitter and the emitter of the transistor Q11 , respectively. The base is connected correspondingly, and the collector is connected to the power supply terminal Vcc.

なお、前記トランジスタQ11のベースは外付け
のコンデンサC13およびタンク回路T11を介して電
源端子Vccに接続されている。
Note that the base of the transistor Q11 is connected to the power supply terminal Vcc via an external capacitor C13 and a tank circuit T11 .

そして第5図は、このような発振回路の外付け
部を除いてIC化を図つた場合におけるトランジ
スタQ11部およびコンデンサC11,C12となる等価
トランジスタQ12部の実装構造を示している。ま
た、第6図は以上のようにしてIC化を図つた発
振回路全体の等価回路を示している。
Figure 5 shows the mounting structure of the transistor Q11 section and the equivalent transistor Q12 section, which becomes the capacitors C11 and C12 , in the case where the external part of such an oscillation circuit is removed and integrated into an IC. . Further, FIG. 6 shows an equivalent circuit of the entire oscillation circuit which has been implemented as an IC as described above.

而して、かかる実装構造および等価回路から明
らかなように、コンデンサC11,C12は等価トラン
ジスタC12のベース−コレクタ間容量およびベー
スエミツタ間容量を利用して形成されているの
で、同一部分に形成し得るから、それだけチツプ
面積を少なくし得る点で有利である。また、コン
デンサC12部のN形領域とP形基板との間に形成
される寄生容量C12′は、電源Vccラインと基準電
位点となる接地間に介挿されることになるので、
回路の発振動作に何んら悪影響を与えないで済ま
せることができるという利点がある。
As is clear from the mounting structure and equivalent circuit, capacitors C 11 and C 12 are formed using the base-collector capacitance and base-emitter capacitance of the equivalent transistor C 12 ; This is advantageous in that the chip area can be reduced accordingly. In addition, the parasitic capacitance C 12 ' formed between the N-type region of the capacitor C 12 part and the P-type substrate is inserted between the power supply Vcc line and the ground, which is the reference potential point.
This has the advantage of not having any adverse effect on the oscillation operation of the circuit.

加えて、この寄生容量C12′は電源Vccラインに
乗るリツプル分を除去し得るようないわゆるバイ
パスコンデンサとして機能するという利点もあ
る。
In addition, this parasitic capacitance C 12 ' has the advantage of functioning as a so-called bypass capacitor that can remove ripples on the power supply Vcc line.

なお、以上においてバイアス電圧端子VBを例
えば電源端子Vccに接続してトランジスタQ11
ベース電位を電源電位とすることにより、コンデ
ンサC11,C12は共に約0.7Vの電圧で逆バイアスさ
れることになる。これによつて、電源電位変動の
影響をあまり受けないで発振周波数の安定化に寄
与することができる。
In addition, in the above, by connecting the bias voltage terminal V B to, for example, the power supply terminal Vcc and setting the base potential of the transistor Q 11 to the power supply potential, both the capacitors C 11 and C 12 are reverse biased with a voltage of about 0.7V. It turns out. Thereby, it is possible to contribute to stabilizing the oscillation frequency without being affected much by fluctuations in the power supply potential.

従つて、以上詳述したようにこの発明によれ
ば、IC化した場合にチツプ面積を可及的に少な
くし得ると共に寄生容量による発振作用の妨げが
ないようにし得る極めて良好な発振回路を提供す
ることが可能となる。
Therefore, as detailed above, according to the present invention, an extremely good oscillation circuit is provided which can reduce the chip area as much as possible when integrated into an IC, and can prevent the oscillation action from being hindered by parasitic capacitance. It becomes possible to do so.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来の発振回路を示す構成図、第2
図、第3図はそれぞれ第1図の一部IC化実装構
造およびIC化後の等価回路を示す図、第4図は
この発明に係る発振回路の一実施例を示す構成
図、第5図、第6図は第4図の一部IC化実装構
造およびIC化後の等価回路を示す図である。 Q11……(発振用)トランジスタ、Q12……
(等価コンデンサ用)トランジスタ、C11〜C13
…コンデンサ、T11……タンク回路、R11,R12
…抵抗。
Figure 1 is a configuration diagram showing a conventional oscillation circuit;
3 and 3 are diagrams respectively showing a partial IC implementation structure of FIG. 1 and an equivalent circuit after IC implementation, FIG. 4 is a configuration diagram showing an embodiment of the oscillation circuit according to the present invention, and FIG. , FIG. 6 is a diagram showing a part of the structure shown in FIG. 4 that has been converted into an IC, and an equivalent circuit after being formed into an IC. Q 11 ... (for oscillation) transistor, Q 12 ...
(For equivalent capacitor) Transistor, C 11 ~ C 13
…Capacitor, T 11 …Tank circuit, R 11 , R 12
…resistance.

Claims (1)

【特許請求の範囲】[Claims] 1 エミツタが出力端に接続されコレクタが電源
に接続されベースがバイアス回路に接続された発
振用トランジスタと、この発振用トランジスタの
ベース−エミツタにエミツタベースが対応して接
続されコレクタが前記電源に接続された等価コン
デンサ用トランジスタと、前記発振用トランジス
タのベースと前記電源間に接続されたタンク回路
とを具備してなることを特徴とする発振回路。
1. An oscillation transistor whose emitter is connected to the output terminal, whose collector is connected to a power supply, and whose base is connected to a bias circuit, and whose emitter base is connected correspondingly to the base-emitter of this oscillation transistor and whose collector is connected to the power supply. An oscillation circuit comprising: an equivalent capacitor transistor; and a tank circuit connected between the base of the oscillation transistor and the power supply.
JP16597379A 1979-12-20 1979-12-20 Oscillating circuit Granted JPS5689102A (en)

Priority Applications (4)

Application Number Priority Date Filing Date Title
JP16597379A JPS5689102A (en) 1979-12-20 1979-12-20 Oscillating circuit
US06/212,745 US4386327A (en) 1979-12-20 1980-12-03 Integrated circuit Clapp oscillator using transistor capacitances
GB8039285A GB2066607B (en) 1979-12-20 1980-12-08 Oscillator
DE3047299A DE3047299C2 (en) 1979-12-20 1980-12-16 Oscillator with an active element formed in a semiconductor substrate

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP16597379A JPS5689102A (en) 1979-12-20 1979-12-20 Oscillating circuit

Publications (2)

Publication Number Publication Date
JPS5689102A JPS5689102A (en) 1981-07-20
JPS6119164B2 true JPS6119164B2 (en) 1986-05-16

Family

ID=15822512

Family Applications (1)

Application Number Title Priority Date Filing Date
JP16597379A Granted JPS5689102A (en) 1979-12-20 1979-12-20 Oscillating circuit

Country Status (1)

Country Link
JP (1) JPS5689102A (en)

Also Published As

Publication number Publication date
JPS5689102A (en) 1981-07-20

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