JPS61199663A - Gto thyristor - Google Patents

Abstract

PURPOSE:To improve the interrupting property of a GTO thyristor by a method wherein a region having a conduction type different from that of the emitter region is provided right under the vicinity of the central axis of the main electrode of the emitter region, which is held between the gate electrodes and comes into contact with the main electrode on one side of this GTO thyristor, not extending so for as the base region adjacent to the emitter region. CONSTITUTION:An N-type emitter region 4 is formed, and after that, a Group III element impurity is selectively diffused from the surface of the emitter region 4 and a high-impurity concentration P-type region 9 is formed in the vicinity of the central axis of the main electrode of the N-type emitter region 4 to the vicinity of the junction of the emitter region 4 with a P-type region 2. Whereby the implantation efficiency into this part of the N-type emitter region 4 drops and the alphaNPN is lowered. Therefore, as ON-state current in this part is lowered, a concentration of current on the central axis part of the N-type emitter region at the time of turn-OFF is relaxed, thereby enabling to enhance the maximum controllable current.

Description

[Detailed description of the invention] [Technical field to which the invention pertains]

The present invention relates to a GTO thyristor in which one main electrode is placed between gate electrodes on one surface of a semiconductor substrate.

[Prior art and its problems]

Fig. 2 conceptually shows the structure of a conventional GTO thyristor. An N-type silicon single crystal is used as a substrate 1, and impurities of group Ⅰ of the periodic table are diffused from one surface of the substrate to form a P base region 2.
Then, from the surface of the P base region 2, elements of group II of the periodic table are diffused in a high concentration to form an N emitter region 4, and by mesa etching, a P base region 3 is formed. A portion of the base region 2 is exposed. exposed P
A gate region 5 is formed on the surface of the base region by diffusing group III element impurities at a high concentration to obtain good ohmic contact.
Then P emitter region 3. N emitter region4. The anode electrode 6 is formed by gold 1i[IIl on the surface of the gate region 50.
．． Cathode electrode7. A gate electrode 8 is provided. When a GTO thyristor with such a structure is in a conductive state and turned off by drawing a current from the gate electrode 8, the off region spreads from the part of the N emitter region 4 close to the gate, so that the central axis of the N emitter is turned off. Current concentrates. Figure 4 is an example of calculating the current in a cross section including the central axis of the cathode electrode during turn-off, where the vertical axis shows the current density and the horizontal axis corresponds to the position of each layer in the schematic cross section of the GTO thyristor drawn above. ing. As can be seen from this figure, there is a risk of thermal destruction occurring in the middle of the N emitter, which has been a major obstacle in improving the cut-off performance of the GTO thyristor.

[Purpose of the invention]

The present invention eliminates the above-mentioned drawbacks, eliminates local current concentration during turn-off, and provides a GTO with good interrupting performance.
The purpose is to provide thyristors.

[Key points of the invention]

According to the present invention, immediately below the vicinity of the central axis of the main electrode in the emitter region in contact with one of the main electrodes sandwiched between the gate electrodes,
By providing a region of a conductivity type different from the emitter region that does not reach the adjacent base region, the DC current amplification factor α of the transistor constituted by the three layers of the four thyristor layers that are in contact with one of the main electrodes is reduced. This reduces current concentration when the GTO thyristor turns off.

[Embodiments of the invention]

FIG. 1 shows an embodiment of the present invention, in which an N emitter region 4 is formed in the same manner as in FIG. A P shadow region 9 with a high impurity concentration is formed near the axis and close to the junction with the P base region 2. FIG. 3 is a top view of this P shadow region 9. For example, a P shadow region having a width of 40 μm is provided at the center of an emitter region having a width of 160 μm. Actually, a large number of N emitter regions 4 are arranged radially from the center of the substrate. By providing such a P shadow region 9, the injection efficiency of this part of the N emitter is reduced and αNFN is reduced. As a result, the on-current in this part decreases, which alleviates the current concentration on the central axis of the N emitter during turn-off, and the GTO
The maximum controllable current of the thyristor can be increased.

【Effect of the invention】

The present invention forms regions of different conductivity types in the vicinity of the center axis of the emitter region sandwiched between the gate regions of the GTO thyristor, thereby alleviating current concentration at the center during turn-off, thereby maximizing the GTO thyristor risk. Extremely effective for increasing controllable current.

[Brief explanation of drawings]

FIG. 1 is a conceptual cross-sectional view of a GTO thyristor according to an embodiment of the present invention, FIG. 2 is a conceptual cross-sectional view of a conventional GTO thyristor, and FIG. 3 is a top view of the N emitter portion of the GTO thyristor shown in FIG. FIG. 4 is a diagram showing an example of calculation of the magnitude of the current in a cross section including the central axis of the cathode electrode during turn-off. 1: N-type silicon substrate, 2: P base region, 4: N emitter region, 7: cathode electrode, 8: gate electrode, 9:
P shadow area. Figure 1

Claims (1)

[Claims] 1) In a device in which one main electrode is placed between gate electrodes on one surface of a semiconductor substrate, the emitter region in contact with one main electrode reaches directly under the vicinity of the central axis of the main electrode to the adjacent base region. 1. A GTO thyristor comprising a region having a conductivity type different from the emitter region without the emitter region.