JPS61206247A - 半導体装置用リ−ドフレ−ム - Google Patents

半導体装置用リ−ドフレ−ム

Info

Publication number
JPS61206247A
JPS61206247A JP60046668A JP4666885A JPS61206247A JP S61206247 A JPS61206247 A JP S61206247A JP 60046668 A JP60046668 A JP 60046668A JP 4666885 A JP4666885 A JP 4666885A JP S61206247 A JPS61206247 A JP S61206247A
Authority
JP
Japan
Prior art keywords
lead
bed
resin
lead frame
semiconductor device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP60046668A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0527986B2 (cs
Inventor
Yoshiaki Tatsumi
辰巳　悦章
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP60046668A priority Critical patent/JPS61206247A/ja
Publication of JPS61206247A publication Critical patent/JPS61206247A/ja
Publication of JPH0527986B2 publication Critical patent/JPH0527986B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/40—Leadframes
    • H10W70/421—Shapes or dispositions
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/075—Connecting or disconnecting of bond wires
    • H10W72/07541—Controlling the environment, e.g. atmosphere composition or temperature
    • H10W72/07551—Controlling the environment, e.g. atmosphere composition or temperature characterised by changes in properties of the bond wires during the connecting
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/541—Dispositions of bond wires
    • H10W72/5449—Dispositions of bond wires not being orthogonal to a side surface of the chip, e.g. fan-out arrangements
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/756—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked lead frame, conducting package substrate or heat sink

Landscapes

  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
JP60046668A 1985-03-11 1985-03-11 半導体装置用リ−ドフレ−ム Granted JPS61206247A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP60046668A JPS61206247A (ja) 1985-03-11 1985-03-11 半導体装置用リ−ドフレ−ム

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP60046668A JPS61206247A (ja) 1985-03-11 1985-03-11 半導体装置用リ−ドフレ−ム

Publications (2)

Publication Number Publication Date
JPS61206247A true JPS61206247A (ja) 1986-09-12
JPH0527986B2 JPH0527986B2 (cs) 1993-04-22

Family

ID=12753732

Family Applications (1)

Application Number Title Priority Date Filing Date
JP60046668A Granted JPS61206247A (ja) 1985-03-11 1985-03-11 半導体装置用リ−ドフレ−ム

Country Status (1)

Country Link
JP (1) JPS61206247A (cs)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2012015202A (ja) * 2010-06-29 2012-01-19 On Semiconductor Trading Ltd 半導体装置およびその製造方法

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS555586A (en) * 1978-06-29 1980-01-16 Mitsubishi Electric Corp Demodulation circuit for digital signal
JPS5555586A (en) * 1978-10-19 1980-04-23 Matsushita Electric Ind Co Ltd Luminous part
JPS57155757A (en) * 1981-03-23 1982-09-25 Hitachi Ltd Semiconductor device
JPS59191360A (ja) * 1983-04-15 1984-10-30 Internatl Rectifier Corp Japan Ltd 半導体装置用リードフレーム

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS555586A (en) * 1978-06-29 1980-01-16 Mitsubishi Electric Corp Demodulation circuit for digital signal
JPS5555586A (en) * 1978-10-19 1980-04-23 Matsushita Electric Ind Co Ltd Luminous part
JPS57155757A (en) * 1981-03-23 1982-09-25 Hitachi Ltd Semiconductor device
JPS59191360A (ja) * 1983-04-15 1984-10-30 Internatl Rectifier Corp Japan Ltd 半導体装置用リードフレーム

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2012015202A (ja) * 2010-06-29 2012-01-19 On Semiconductor Trading Ltd 半導体装置およびその製造方法

Also Published As

Publication number Publication date
JPH0527986B2 (cs) 1993-04-22

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