JPS6150272A - Recording and reproducing device of still picture - Google Patents

Abstract

PURPOSE:To improve the accuracy of recording and reproducing and to obtain a sufficient still picture editing accuracy by starting the recording and reproducing in synchronizing with the position signal of a rotating magnetic head. CONSTITUTION:A magnetic tape 1 is caused along a tape guide drum 2 and traveled at the prescribed speed. Rotating magnetic heads 3A and 3B are rotated at the prescribed speed, and a still picture is recorded and reproduced on a magnetic tape 1 as plural gradient tracks in units. In accordance with the gradie ent track unit in the longitudinal direction of the magnetic tape 1, a fixed magnetic head 4 records and reproduces a synchronizing signal and address data, and supplies them to a system control circuit 5. By supplying the synchronizing signal and address data reproduced by the magnetic heads 3A and 3B to the system control circuit 5, the recording and reproducing are delayed by the prescribed time after the termination of the synchronizing signal, and start synchronous with position signals of the magnetic heads 3A and 3B. Thus the sufficient editing accuracy can be obtained.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a still image recording and reproducing apparatus in which one still image is recorded and reproduced on a magnetic tape in units of a plurality of tilted trunks.

[Conventional technology]

Conventional video VTRs (video tape recorders) (ICs) record time codes corresponding to one frame and are used for editing, etc. However, with only this time code, editing accuracy can only be compensated for at ±0 frame VC. Hade @ f, VITC
(vertical interval time code) etc. are used.

[Problem that the invention seeks to solve]

In a still image recording and reproducing device in which one still image is recorded and reproduced on a magnetic tape using multiple inclined tracks as a unit,
Since even one track is not allowed to be missing, it is difficult to obtain a sufficient editing angle of 1'8 degrees with the above-mentioned conventional method. Therefore, it is an object of the present invention to make it possible to obtain a sufficient level of accuracy with such a stationary IIIU recording and reproducing apparatus.

[Means for solving problems]

In order to solve the above-mentioned problems, the present invention is configured such that recording or playback is started after a predetermined time delay from the end of the synchronization signal recorded in the address trunk, and in synchronization with the position signal of the rotating magnetic head. be.

For example, in Figure 1, (1) is f) with S staple,
The tape is made to run obliquely along the tape guide drum (2) over an angular range of, for example, 180°, and run at a predetermined speed.

Furthermore, (3A) and (3B) are rotating magnetic heads, which are arranged at an angular interval of 180° and rotated at a predetermined speed. In this case, still images are recorded and reproduced on the magnetic tape (1) in units of a plurality of inclined tracks.

In addition, (4) corresponds to the units of the plurality of inclined trunks described above in the longitudinal direction of the magnetic tape (1), and the synchronization signal 5YNC is
This is a fixed magnetic head that records and reproduces address data ADDATA and address data ADDATA. This magnetic head (4) K is supplied with a synchronizing signal 5YNC and address data ADDATA from the system control circuit (5) and recorded therein, and also receives a synchronizing signal 5YNC reproduced by this magnetic head (4).
and address data ADDATA are supplied to the system control circuit (5).

[Effect]

In the above configuration, the magnetic heads (3A), (3B
) synchronous signal 5YNC and address data'
ADDATA:,E,xi*:+y). −2□,
5. Recording and playback can be performed using synchronization signal 5.
The magnetic head (3A
).

(3B) is started in synchronization with VJ''In 4.+-. Therefore, sufficient editing precision can be obtained.

〔Example〕

Hereinafter, a practical example of the present invention will be described with reference to FIG. 2 and subsequent figures.

FIG. 2 is a structural diagram showing the entire installation of this example.

In the figure, red, green, and blue signals SR, S, and SB are supplied to the matrix circuit (7) from terminals (6R), (6G), and (6B), respectively. Matrix circuit (7)
from the luminance signal Y, red difference signal RY, and blue difference signal B
-Y are obtained, and these signals are converted into digital signals by the Φ converter (8) and then supplied to the first image memory (9), where one frame is stored in this image memory (9). minutes will be written.

Further, the signal written in the image memory (9) is CPt
The 8-bit signal read from this second image memory circle is encoded, modulated, etc. by J (10) and written to the image memory 0υ of the rear cylinder 2.
It is converted into a 10-bit signal by a 10-bit conversion circuit Q2. This 10-bit signal is connected to the parallel/serial conversion circuit (13)
After being converted into a serial signal, the signal is supplied to the rotating magnetic heads (3A) and (3B) via the recording amplifier α4) and the recording side R of the recording/reproducing switch (15).

Magnetic heads (3A) and (3B) are mutually 1c180°
They are arranged with an angular spacing of , and are rotated at a predetermined speed.

In addition, (1) is a magnetic tape, and this magnetic tape (1) is a magnetic tape.
) is run diagonally along the tape guide drum (2) over an angular range of approximately 180° at a predetermined speed.

Here, the rotating magnetic head (3
A) and (3B) are scanned alternately, and as shown in FIG. recorded. In this case, a synchronization signal 5YNC and address data ADDATA are provided in advance in the longitudinal direction of the magnetic tape (1).
An address trunk TA is formed in which the recording Vi synchronization signal 5YNC is recorded, and is started in synchronization with the position signals of the rotation loss heads (3A) and (3B), delayed for a predetermined time from the end of the recording Vi synchronization signal 5YNC. In FIG. 3, TC is a control signal CT corresponding to each track of the inclined track (LA).
L is the recorded control track.

Also, during playback, the rotating magnetic heads (3A) and (3B)
A plurality of inclined trunks (IA
) are scanned alternately, and signals for one frame are sequentially obtained. This signal is supplied to the equalizer aη via the reproduction side P of the recording/reproduction switch a9 and the reproduction amplifier ae, and is waveform-equalized. In this case, reproduction is also delayed by a predetermined time from the end of the synchronizing signal 5YNC recorded on the address track TA, and is started in synchronization with the position signals of the rotating magnetic heads (3A) and (3B).

The waveform-equalized signal is sent to the serial/parallel conversion circuit 0.
After being converted into a parallel signal by υ, the 10/8 conversion circuit 0
! 1 is converted to 8-bit signal, 2nd is image memory old)
is supplied and written to. This second image memo! J01
) K The written signal is demodulated by the CPU (10,
After processing such as decoding, the image is supplied to the first image memory (9) and captured.

The luminance signal Y1, the red difference signal RY, and the blue difference signal B-Y are read out from this first 1lii l''U memory (9) for one frame, page by page, and these signals ViD/A
After being converted into an analog signal by a converter, it is supplied to a dematrix circuit. And the terminal (22R),
(22G) and (22B) contain one frame of red,
Green and blue signals So and S are obtained.

In addition, the signal waveform-equalized by the equalizer (17) is PL
The reproduced clock signal CK is supplied to the L circuit (to), and the reproduced clock signal CK is obtained from the PLL circuit (a).

Further, in FIG. 2, (5) is a system control circuit, and access, recording, reproduction, etc. are controlled by this system control circuit (5).

Further, Q→ is a servo circuit, and the drum, capstan, reel, and tracking are servoed under the control of the system control circuit (5). Also, (c)
is a key device, and control of the system control circuit (5) is performed based on the operation of this key device (a) by the user 1.

Further, (4) is the synchronization signal 5YNC as described above.

Address data ADDATA to address track TA
This is a fixed magnetic head for recording and reproducing Ic. This magnetic head (4) is supplied with a synchronizing signal 5YNC and address data ADDATA from a system control circuit (5), and the signals obtained from this magnetic head (4) are It is supplied to the system control circuit (5).

Further, H is a fixed magnetic head that records and reproduces the control signal CTL on the control track TC, and this magnetic head (C) is equipped with a system control circuit (5
) supplies the control signal CTL, and the signal obtained from the magnetic head (c) is supplied to the system control circuit (5).

Next, how address trunks TA and control tracks TC are formed in the longitudinal direction of the magnetic tape (1) before recording will be described with reference to FIG.

In the same figure, (c) is the system control circuit (
5), and from this CPU @,
For example, 14-bit address data ADDATAi is supplied to the latch circuit through the input/output port (c) and latched. Then, the latched address data AD
DATA is converted to serial signal and sent to multiplexer 0
It is supplied directly.

In addition, 03 is, for example, a 60Hz control signal CT.
The generator L (shown in Figure 5A) supplies this control signal CT to the magnetic head (C) via the recording amplifier (B), forming a control track TC on the magnetic tape (1). be done. In addition, the control signal C
TL is a phase comparator (35a), a low 4th filter (
35b), a 1 frequency divider (35c), and a lightning pressure controlled variable frequency oscillator (35d). As shown in FIG. 5B, a signal is obtained which is synchronized with the control signal CTL and has twice its frequency, and this signal is supplied to the latch circuit and multiplexer 01 as an address clock signal. In addition, data S such as tape status is input to multiplexer 0■ from terminal (32a).
DATA is supplied. Then, switch from the CPU to multiplexer 0 via the input/output port (1): Ii
A control signal ST is supplied to the multiplexer o2, and a signal as shown in FIG. 6 is obtained from the multiplexer o2. That is, the 5YNC section where the synchronization signal 5YNC exists, the DATA section where address data ADDATA exists, and the USE section where TA exists to data SD such as the tape status.
7 in the R part, one DATA part where there is data with the 1-bit-1 order of the LSB and MSB of the address data ADDATA reversed.
r! ! will be accomplished. The 5YNC portion is a signal in which the high level continues for 15 clocks. The reason why the 5YNC section is configured this way is that the address data ADD is
The 1tit of ATA must be trimmed accurately (・
4 to enable counting of synchronization (No. 1 5YNC. , in this example, has a length corresponding to 60 tracks.In this case, as shown in Figure 5 of the Imperial Decree, the address data ADDAT,A (shown in C of the same figure) is connected to the control signal CTL (shown in A of the same figure). The phase is shifted by 90 degrees.

This is because the address data ADDATA is advantageously reproduced by both EN and NO of the reproduction control signal CTL.

Note that the trigger signal ST is delayed by the delay circuit 0) and then supplied to the latch circuit (c) as a latch signal.

The signal obtained from multiplexer 09 is sent to recording amplifier e.
A magnetic head (4) K is supplied through the magnetic tape 371, and an address trunk TA is formed on the magnetic tape (1).

Next(, Please refer to FIG. 7 for how recording and playback are performed after the address track TA and control track TC are formed in the longitudinal direction of the Yamaki tape (1) in this way. 〇 In the figure, (38 is a demultiplexer, to which the signal reproduced by the magnetic head (4) from the address trunk TA is supplied via the reproduction amplifier (g), and the signal is supplied from the control trunk TC to the magnetic head QQ. The reproduced control signal CTL is supplied as a clock signal via the reproduction amplifier fIQ.The address data ADDATA obtained from this demultiplexer (to) is demodulated by the address demodulation circuit 0υ, and then sent to the single output port ( 6) via C
Supplied to PU @. Further, the synchronization signal 5YNC obtained from the demultiplexer 08 is demodulated by the synchronization demodulation circuit 03, and then supplied to the CPU zz via the input/output port ←9, and is also supplied to the CPU (c) as an interwoven signal.

When a recording starts at 11f, when the key device (C) (see Figure 2) gives the address TA, the tape speed is increased and a high-speed search (access) to the address TA is performed. Ru. At this time, address output data D
ATA is determined based on the flowchart shown in FIG.

First, when the synchronization signal 5YNC is detected, the magnetic tape (
1) The counter is incremented or decremented depending on the running direction. Next, address data A
The address data A is read by the DDATA reading routine.
DDATA is read and compared to the value of the counter mentioned above. If they match, the address data ADDATA
is taken as output data DATA.

On the other hand, if they do not match, they are processed by a data processing routine. This data processing routine is executed as shown in FIG. 9, and the causality of address data ADDATA is investigated. That is, the direction of movement of the magnetic tape (l)
You can check whether it is incrementing or decrementing by 1. If it is done correctly, the lamp address data ADDATA is determined to be correct, and at the same time the value is set as the output data DATA, the counter value C0tJ is set.
NT can also be replaced. In other cases, the counter value C0UNT is used as the output data DATA. For example, counter value C0UNT, address data ADDATA
The relationship between the output data DATA and the output data DATA is as shown in FIG.

The running position is determined by this output r-data, and the starting point of recording or reproduction is determined based on this.

This starting point is determined based on 70-char shown in FIG.

First, it is determined whether the output data DATA matches the target address TA. If they match, synchronization signal 5Y
The rising edge of NC is detected, and then the falling edge of synchronizing signal 5YNC is detected. Next, the falling edge of the synchronization signal 5YNC (
Trigger after a certain period of time has elapsed after detection (shown in Figure 12A)
Gurus PT (shown in the 12th diagram) is generated.

In the seventh section 1iC, it is supplied to the clock terminal CK of the D-flip 70 via the tri-gurusu PT input/output port (9). A high level signal is supplied to the D terminal of this flip-flop θQ, and when the trif signal P is supplied to the output terminal Q, a low level signal is obtained. The signal obtained at the output terminal Q of this slip 70 tube 67G is supplied to the D terminal of the D-clip fluorosode a7). In addition, a switching pulse PSW that alternately switches the magnetic heads (3) and (3B) is connected to the terminal (B).
(shown in FIG. 12C) is supplied to the clock terminal CK of the flip 70 tube a''i) via the inverter II, and the output terminal QK is supplied with the second switching pulse Psw C) edge after the fall of the synchronizing signal 5YNC. A signal (shown in Fig. 12 Etc) that becomes high level is obtained, and this is supplied to the CPU (C) l and C via the input/output port ring.Then, after the fall of the synchronizing signal 5YNC, the second switching The edge of the pulse P8w is taken as the starting point of recording or reproduction.What is shown in FIG. 12B is the reproduction control signal CTL.

In this way, recording or playback is started, and when recording on the diagonal track or playback from multiple diagonal tracks is completed, the running of the m% tape (1) is stopped and the recording or playback is completed. .

That is, as shown in the flowchart of FIG. 11, after the occurrence of the signal PT, the next rising edge of the synchronizing signal 5YNC is detected, and then the rising edge of the synchronizing signal 5YNC is detected. Then, after the data end is detected, the magnetic chip 7
''(1) is stopped and finished. The data end signal is formed as follows. Namely, in FIG.
The signal obtained at the output terminal Q of the flip-flop θη is supplied to one input side of an AND circuit (51), and the other input side of this AND circuit (5]) is supplied with a switching signal that is supplied to the terminal (9). Pulse PSW is multiplier (52)
A multiplied signal is provided. In this case, the AND circuit (
From the output side of 51), a pulse signal that becomes high level corresponding to each track of a plurality of diagonal trunks, for example 60, is obtained from the start point of recording or reproduction, and this Noculus signal 1U6. Cafy 7. (53)/11077*
M-7-CK. Yaoiru. And this counter (53
) overflow signal SOF is input to the CPU (c) via the inverter (54) and input/output capo (55).
(This is the data end.

It is considered to be a signal.

Further, in FIG. 7, the overflow signal Soa is supplied as a reset signal to flip-flops 20 and 071, and the flip-flops G+d and 071 are in a reset state.

According to this example, the start point of recording or reproduction is the second switching pulse P! after the fall of the synchronizing signal 5YNC! Since the edge of the lvv is used, the effects of, for example, drums, capstan knotters, etc., are reduced, and the efficiency of recording or playback is improved.

In the above embodiment, the second switching pulse PAW after the fall of the synchronizing signal 5YNC is the starting point, but the starting point may be the third or later.

〔Effect of the invention〕

As described above, according to the invention, recording or playback is delayed by a predetermined time from the end of the synchronization signal recorded in the address trunk, and starts recording or playback in synchronization with the position signal of the rotating magnetic head. The phase change is improved, and sufficient editing precision can be obtained.

[Brief explanation of drawings]

FIG. 1 is a block diagram for explaining the present invention, FIG. 2 is a block diagram showing an embodiment of the present invention, and FIGS. 3 to 12 are diagrams for explaining the same. (1) is a magnetic tape, (3A) and (3B) are rotating magnetic heads, (4) is a fixed magnetic head, and (s) is a system control circuit. , 1sIP agent Sada Ito ;,
', '1) Figure 13 Figure 6 Figure 2 1 °i Figure 4

Claims (1)

[Claims] In a still image recording and reproducing device in which still images are recorded and reproduced on a magnetic tape in units of a plurality of inclined tracks by a rotating magnetic head, a synchronization signal and an address corresponding to each unit of the plurality of inclined tracks in the longitudinal direction of the magnetic tape are provided. A still image recording and reproducing apparatus characterized in that an address track on which data is recorded is formed, and recording and reproduction is delayed by a predetermined time from the end of the synchronization signal and is started in synchronization with the position signal of the rotating magnetic head. .