JPS6157534U - - Google Patents

Info

Publication number
JPS6157534U
JPS6157534U JP1984142967U JP14296784U JPS6157534U JP S6157534 U JPS6157534 U JP S6157534U JP 1984142967 U JP1984142967 U JP 1984142967U JP 14296784 U JP14296784 U JP 14296784U JP S6157534 U JPS6157534 U JP S6157534U
Authority
JP
Japan
Prior art keywords
bumps
semiconductor device
electrical connection
flip
heat dissipation
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1984142967U
Other languages
English (en)
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1984142967U priority Critical patent/JPS6157534U/ja
Publication of JPS6157534U publication Critical patent/JPS6157534U/ja
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H10W72/221—Structures or relative sizes
    • H10W72/227—Multiple bumps having different sizes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/721—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors
    • H10W90/724—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors between a chip and a stacked insulating package substrate, interposer or RDL

Landscapes

  • Cooling Or The Like Of Electrical Apparatus (AREA)
JP1984142967U 1984-09-21 1984-09-21 Pending JPS6157534U (cs)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1984142967U JPS6157534U (cs) 1984-09-21 1984-09-21

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1984142967U JPS6157534U (cs) 1984-09-21 1984-09-21

Publications (1)

Publication Number Publication Date
JPS6157534U true JPS6157534U (cs) 1986-04-17

Family

ID=30701279

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1984142967U Pending JPS6157534U (cs) 1984-09-21 1984-09-21

Country Status (1)

Country Link
JP (1) JPS6157534U (cs)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4918598U (cs) * 1972-05-18 1974-02-16
JPS5028794A (cs) * 1973-07-13 1975-03-24

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4918598U (cs) * 1972-05-18 1974-02-16
JPS5028794A (cs) * 1973-07-13 1975-03-24

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